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???
12/08/04 16:38
Modified:
  12/08/04 16:39

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#82766 - atmel port 0
Responding to: ???'s previous message

With configurable ports, you need no buffers, the output will be configured push_pull, all inputs will be open collector.


By saying other signals I mean signals from other sours (not signals from the processor).


Rereading atmel's 8051 hardware description remind me that port 0 is truly bidirectional (no pull-ups) and if it is configured as input it floats. Can i use port 0 as data/address bus (it is bidirectional but only one tolks at a time) ... and with external buffer to realize the other signals (most of them are only in reading mod from the slave side of view)?

List of 22 messages in thread
TopicAuthorDate
Master / slave parallel bus            01/01/70 00:00      
   suggestion            01/01/70 00:00      
      info            01/01/70 00:00      
         config ports            01/01/70 00:00      
            serial parallel ?            01/01/70 00:00      
               various            01/01/70 00:00      
                  atmel port 0            01/01/70 00:00      
                     Port 0 as communicator            01/01/70 00:00      
                        Sorry, did not look            01/01/70 00:00      
                           reply            01/01/70 00:00      
                           supplier..            01/01/70 00:00      
                              speed            01/01/70 00:00      
                                 go on            01/01/70 00:00      
                                    to the above            01/01/70 00:00      
                                       Re: to the above            01/01/70 00:00      
                                          open collector push-pull no way            01/01/70 00:00      
                                             open collector and upsh-pull            01/01/70 00:00      
                                                push pull drive, OC receive            01/01/70 00:00      
   How to post ASCII Art            01/01/70 00:00      
   All in one chip!            01/01/70 00:00      
   Why parallel ?            01/01/70 00:00      
   CAN or cannot            01/01/70 00:00      

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