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???
03/16/05 22:04
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#89814 - depends on data rate
Responding to: ???'s previous message
Jez Smith said:
I said use the asyncronous fifo eric,the cost of implementing it is going to be minimal compared to the time spent debugging the system using any other scheme


Grant didn't really indicate his target data rate, other than to say that "bit-banged I2C" isn't fast enough. If he can stand the overhead, perhaps my mailbox register concept is adequate.

A FIFO would certainly work, perhaps with minimal glue logic, but even small FIFO chips are expensive.

Methinks Grant must rethink his budget if all he can afford are some 74xxx parts but he wants very fast data transfer.

Maybe hardware (not bit-banged) high-speed (3.4 Mbps) I2C between the two micros is fast enough?

-a



List of 31 messages in thread
TopicAuthorDate
Contemplating multiprocessor            01/01/70 00:00      
   fifo            01/01/70 00:00      
      and also            01/01/70 00:00      
   multiprocessor communication            01/01/70 00:00      
      ACKs            01/01/70 00:00      
      You want it all and you want it for free            01/01/70 00:00      
         Why not HW I2C or SPI            01/01/70 00:00      
            Why not HW I2C or SPI            01/01/70 00:00      
            USB ???            01/01/70 00:00      
               USB !!!            01/01/70 00:00      
                  USB            01/01/70 00:00      
                     You Correct Sir            01/01/70 00:00      
                  USB != I2C            01/01/70 00:00      
                     USB > I2C            01/01/70 00:00      
         do not multimaster            01/01/70 00:00      
   hmm            01/01/70 00:00      
   concurrence            01/01/70 00:00      
   This is why            01/01/70 00:00      
      depends on data rate            01/01/70 00:00      
   Normally            01/01/70 00:00      
   Are You Sure            01/01/70 00:00      
      I would be            01/01/70 00:00      
         I would be            01/01/70 00:00      
            it works for me            01/01/70 00:00      
      Are You Sure            01/01/70 00:00      
         IIC speed - no limit            01/01/70 00:00      
         nixed by other team members            01/01/70 00:00      
   Multi-Proc Xface            01/01/70 00:00      
      exactly            01/01/70 00:00      
   Shift register (Mode 0)?            01/01/70 00:00      
   Time savers            01/01/70 00:00      

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