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???
03/17/05 02:22
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Msg Score: +1
 +1 Good Answer/Helpful
#89843 - Time savers
Responding to: ???'s previous message
Developing the parallel ideas a bit further, there are some time savers that you can apply to your initial proposal.

First, CLK and ACK don't need to return to their original state for the next byte. You already know all you need to know from one edge. So for one byte, CLK goes H to L, and the next byte CLK goes from L to H. Same thing for ACK. (Anybody remember Laplink?)

Second, CLK can be the data strobe from A->B, with ACK being the acknowlege. When B is talking, ACK is the data strobe from B->A and CLK is the acknowledge.

Who wins a collision? BUSY indicates that A wants to talk. When BUSY is asserted, B will listen, or if already talking will quit ASAP. After asserting BUSY, A will wait for a specified period before transmitting, enough time for B to clear the bus if it was trying to talk.

A knows that B is talking if A sees transitions on ACK when it hasn't sent a byte.

List of 31 messages in thread
TopicAuthorDate
Contemplating multiprocessor            01/01/70 00:00      
   fifo            01/01/70 00:00      
      and also            01/01/70 00:00      
   multiprocessor communication            01/01/70 00:00      
      ACKs            01/01/70 00:00      
      You want it all and you want it for free            01/01/70 00:00      
         Why not HW I2C or SPI            01/01/70 00:00      
            Why not HW I2C or SPI            01/01/70 00:00      
            USB ???            01/01/70 00:00      
               USB !!!            01/01/70 00:00      
                  USB            01/01/70 00:00      
                     You Correct Sir            01/01/70 00:00      
                  USB != I2C            01/01/70 00:00      
                     USB > I2C            01/01/70 00:00      
         do not multimaster            01/01/70 00:00      
   hmm            01/01/70 00:00      
   concurrence            01/01/70 00:00      
   This is why            01/01/70 00:00      
      depends on data rate            01/01/70 00:00      
   Normally            01/01/70 00:00      
   Are You Sure            01/01/70 00:00      
      I would be            01/01/70 00:00      
         I would be            01/01/70 00:00      
            it works for me            01/01/70 00:00      
      Are You Sure            01/01/70 00:00      
         IIC speed - no limit            01/01/70 00:00      
         nixed by other team members            01/01/70 00:00      
   Multi-Proc Xface            01/01/70 00:00      
      exactly            01/01/70 00:00      
   Shift register (Mode 0)?            01/01/70 00:00      
   Time savers            01/01/70 00:00      

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