I guess I've been around these one-clockers too long. I just start thinking the MCU operates at the oscillator frequency, not that frequency/12. Of course, I can't do arithmetic in my head any more ... it's hell getting old ... and I'm supposed to be a mathematician. <sigh>

The ALE is generated at 4 MHz/12 or 333.333 Khz or so. divide that by two and you have ~166 kHz. I don't know why you want that flipflop in there, but you can certainly have it if you want tath to be your conversion clock. There is one other thing ... the ALE to the ADC is the signal that selects the input channel. It is latched on the RISING EDGE of the ALE, so you can't reliably use the ALE from the 8751 directly. You could, of course, invert it. Without the ALE input, you can't select a channel. If I were doing this, I'd be concerned about changes on the input signal with so slow a clock. I don't know what this converter does with the input signal internally, but it doesn't say anything about a sample-and-hold, and if there's any chance at all that the input signal will change, you might want to mitigate that effect by running a faster clock.

The EOC signal, which you could view as a low-going "BUSY" flag, has to be given nominally 2 microseconds + 8 clock periods to go low. You must wait for a transition from low to high to sense the end of conversion.

Yes, you can, as shown in the datasheet, connect ALE and START together, but the ALE must not go high before the channel select addresses are valid. I don't know how you'll arrange that without using the ALE from the if you're using memory-mapped I/O. Port I/O is easier, as it requires no gating or anything.

The ADC clock can be as fast as 1.28 MHz. The implication would be that this frequency governs the minimum pulse width of the clock, which would be about clock would be about 390 ns. If your ALE from the 8751 is longer than that, it will be adequate. If I were in your place, I'd remove that flipflop if the ALE width exceeds 390 ns and clock the converter with that clock directly, as the datasheet doesn't seem to restrict the clock in any way other than frequency.

One thing I remember about precision. This device is specified at having an accuracy that deviates slightly more than 1 lsb either way. Additionally, you are running the device quite slowly, which will exacerbate any local effects, i.e. PSU ripple, etc, and, as I mentioned, the changing voltage on the input. If you were to sample at a higher rate, sampling each channel several times, you could average these samples together, thereby averaging out any random effects that change over the sample period. Also, if the voltage is slowly changing, you'd have an average over the sample period. What you must do, of course, depends on the result you want.

It's been a long time since I last used this device and its larger brother, the ADC 0816/17 but it does seem to me that it makes sense to use it as fast as it will go. Perhaps you have other requirements that limit you in this regard, but if you run the 8751 with an 11.0592 MHz clock, as is popular with many (If you're not using the serial port, use 12 MHz if you prefer), and divide the ALE by two as you're presently proposing, while using ports to attach to the ADC, you will have an adequately slow clock, with a wide enough pulse width to meet the ADC requirements. All the other signals will be at your leisure, i.e. they'll last as long as you let them, so there'll be no timing issue. You'll also need no external logic, aside from the flipflop.

RE