In the following I assume a pretty standard off-the-shelf vanilla flavour 8051 (although it may be strawberry if one prefers that).


If th UART is eaten up for the SPI-like task, there are at least three quite straighforward ways to interface a '51 to PC:
1. use LPT on PC and connect the micro in "parallel"
2. use an external-data-memory-mapped 16C550 or alike
3. bit-bang a 1200bps UART on the '51, it's actually very easy and examples lie around in pi... - ehm - heaps


Bah. Consider (clock&latch levels/edges are arbitrary here):

;data to be shifted out are in acc; returns data shifted in in acc
   clr   LATCH  ;latch the input data
   mov   r2,#8  ;prepare counter
loop:
   mov   c,MISO ;input data bit
   rrc   a      ;data are LSB first
   mov   MOSI,c ;output data bit
   clr   CLK    ;advance shift
   setb  CLK
   djnz  r2,loop
   ret

That's 70 cycles on the vanilla, including call and ret. Sure it is more than some 10 cycles needed for

   mov   dptr,#portaddress
   movx  @dptr,a
   movx  a,@dptr
   ret

but I doubt the "overhead" for the input/output data manipulation will be less than several tens of cycles, so what's up?


Not quite so. In fact, you don't need to check/write ri/ti at all, simply count your cycles. Note that in fact it takes some 9-10 12-clock cycles to shift out a (8-bit) byte, so there *is* some time for data processing. And if the data preparation takes more it doesn't really matter, as the UART mode 0 is master-only. The only real concern here is, that it is in fact single direction.

Jan Waclawek