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???
06/22/06 20:31
Modified:
  06/22/06 20:36

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#118886 - no, it is not - but it is a very well de
Responding to: ???'s previous message
SPI??? Is that in the "bible"
no, it is not (neither is RS-232) - but it is a very well defined synchronous bus.

The advantage of asunch is that you get 'recognizable' results (which, of course you eject) if you lose one bit, which with synchronous, everything is garbled after a bit loss. SO, yes synchronous where the line is reliable and internal, asynch everywhere else. A question: how do you detect end of data if you lose a bit in a synchronous data stream, you will end up waiting for that bit forever or - even worse - pick up the first bit of the next transmission and thus screw that one up as well. The means of answering this question equates overhead.

ALSO: how would you make a practical 5 node bus, where the 9 bit mode shines?

Erik

List of 34 messages in thread
TopicAuthorDate
74hc595/597 connection with c51            01/01/70 00:00      
   Any available port pin            01/01/70 00:00      
   I'd suggest you read the datasheet            01/01/70 00:00      
      little more info as u require richard            01/01/70 00:00      
         start it simple and stupd            01/01/70 00:00      
   bit-bang            01/01/70 00:00      
      problem is ...            01/01/70 00:00      
         talking about standard '51...            01/01/70 00:00      
            That's why I want to "fix" it ...            01/01/70 00:00      
         there is'nt so why do you proselytize f            01/01/70 00:00      
            PC's are async, Mode-0 is not            01/01/70 00:00      
               I know that, but 99.17% of all '51 UART            01/01/70 00:00      
                  Do you know what UART means?            01/01/70 00:00      
                     A resounding NO. I use synchrono            01/01/70 00:00      
                        SPI??? Is that in the "bible"            01/01/70 00:00      
                           no, it is not - but it is a very well de            01/01/70 00:00      
                              You're well into nonsense, now, Erik            01/01/70 00:00      
                              you just ignore the real reason            01/01/70 00:00      
                                 This may be a valid topic, but not here.            01/01/70 00:00      
                                    Whenever you use shift registers for I/O            01/01/70 00:00      
                                       Doesn't SPI have a bunch of "features?"            01/01/70 00:00      
                                          yes, we ARE mixing, both threads touch s            01/01/70 00:00      
                                             I don't want to confuse the O/P ...            01/01/70 00:00      
                                                that would be wrong            01/01/70 00:00      
                                                   I think we've lost the O/P            01/01/70 00:00      
                           this may be the answer to your 'prayers'            01/01/70 00:00      
                              Thanks, but which prayers are those?            01/01/70 00:00      
                                 those for a fast synchronous communicati            01/01/70 00:00      
                                    I don't want to use a commercial chip            01/01/70 00:00      
                                       why not            01/01/70 00:00      
                                          If I want to use SPI, I'll build it in            01/01/70 00:00      
                  Do you know what UART means?            01/01/70 00:00      
                     ^%$#@! I didi it again!            01/01/70 00:00      
   Depends on your needs...            01/01/70 00:00      

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