??? 08/10/07 08:00 Read: times |
#143036 - can you please be more precise... Responding to: ???'s previous message |
Richard Erlacher said:
I've done a little experimenting with RESET and with Vcc fall times. If I use a really hefty linear power supply, one which, with the on-board ~2750 uF of capacitance still produces a rise time on Vcc of about 140 microseconds, when switched on, I see no observable flaws in the RESET behavior. However, when I switch off the power, regardless of whether I use a DALLAS, Philips, Signetics, Siemens, or Intel MCU, it frequently (about one time in 6) corrupts my BBRAM, which is mapped into both data and program space. It does not exhibit this behavior on a pushbutton RESET. Can you be please more precise in describing, what exactly you did, what was the circuit (especially the chipselect and power of the BB RAM - is it the type integrated with battery, or a standard SRAM and a battery?), and what were the results? -- Or, do I understand it right, that you DID NOT use a proper reset IC with this experiments? And, do I understand it right, that you encountered NO BBRAM corruption when holding the reset input high by a pusbutton, while playing with VCC? If this is the case, is this not enough evidence for you, that it IS the reset IC (which "holds" the "button" for you upon power failure) which is what you really need to prevent the BBRAM corruption, and NOT any sophisticated precise VCC control? JW |