| ??? 08/10/07 22:43 Read: times |
#143079 - Isn't that the same thing with different syntax? Responding to: ???'s previous message |
Kai Klaas said:
Richard said:
I'm not at all sure what you mean by "slow or "stumbled" power-ups" since "the bible" clearly states that Vcc must have a rise-time of 1 ms or less. Are you suggesting, by this statement, that "the bible" is incorrect, that it is irrelevant, or that it doesn't apply to ATMEL components? No, "stumbling" means, that bouncing can occur, when you want to switch-on a battery powered micro. "Slow" means, that it can take about one mains half-period (which is up to 10msec) to fully charge-up the storage cap in front of 7805, which is way beyond your 1msec limit. By the way, the "bible" does not state that "Vcc must have a rise time of 1msec or less". Read carefully: Power-on Reset An automatic reset can be obtained when VCC is turned on by connecting the RST pin to VCC through a 10mf capacitor and to VSS through an 8.2k resistor, providing the VCC rise time does not exceed 1 millisecond and the oscillator start-up time does not exceed 10 milliseconds. This means, that a time constant of 10µF times 8.2kOhm is enough, if the Vcc rise time does not exceed 1 millisecond That's something totally different. Kai Kai, I believe you're referring to a distinction without a difference. It seems to me that, no matter what else occurs, a Vcc rise time of 1 ms or more is a violation of this condition. A longer than 10 ms startup time of the oscillator would, likewise, violate these specified limits, don't you agree? I do agree that, nowhere does it say anything else about the rise time of Vcc. Further, it says nothing about the Vcc fall time. I completely disagree with your interpretation of this statement as saying, simply, that the time constant of a 10 uF cap pulled down by 8K2 is enough. I believe that it says more than that, namely that, first and foremost, you must provide a Vcc rise time of < 1 ms, at the end of which time you must have reached and settled at a "legal" level for Vcc. Secondly, you must use a crystal/cap combination that starts and reaches steady-state in less than 10 ms. Implicit in this, I agree, is the notion that the charge rate of the 10 uF cap pulled down with 8K2 is sufficient to mask those events within positive RESET. However, the emphasis is on the rise time of Vcc and not on "the time constant is enough..." which also says to me that no such system can be expected to function properly if its Vcc rise time exceeds 1 ms. Since undefined circumstances can occur in the range between about 1.8 volts and "legal" Vcc, I'd be inclined to avoid that range as much as I can by abbreviating the transitions. I'd say that limiting on-board decoupling capacitors to a maximum sum of, say, 50-100 uF might be a step in the right direction. I believe that, if you turn on the input to a 7805 with a sufficiently hefty supply, its output will reach its specified limit within well under a ms, even when it's charging 50-100 uF of cap's distributed throughout board. I know it's tempting to put 300 uF here and 100 there ... it helps with the relays and power transistors turning on and off. I've done it myself, but in recent months I've persuaded myself that the capacitance belongs in the off-board power supply. I'm even thinking that one should provide an acute discharge mechanism, that disconnects the off-board power source and discharges Vcc, that's active until Vcc is less than a forward biased diode above GND whenever RESET goes active. An SCR might be just the thing. This should pull the on-board Vcc down to < 0.7 volts within, say a very few microseconds. After that, it's just another power-on cycle. RE |
