Hi,
Datasheet says that if you set either bit 0 or 1 of HCR1 register to access external memory then all memory accesses for both internal and external memory will appear on ports 0 and 2. and ... also forces bits P3.6 and P3.7 to be used for WR and RD instead of I/O.. Seems it means that you are right about your tests. Is it time to ask Texas Instruments about details? (=
Good days!