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11/15/03 15:14
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#58773 - RE: switch debounce - max 6818
Responding to: ???'s previous message
Peter:
I agree with you and your software idea for filtering and debouncing discrete inputs to a microcontroller.

All you others:

I would never use one of these ICs that proports to be a "contact bounce eliminator". They are just too expensive for what you get. There are MANY other ways of achieving an isolated and ESD protected input other than the use of one of these chips. As a matter if fact I have found that in almost all instances where I was interfacing in an industrial situation that I needed isolation and ESD protection at the same time. That calls for opto-couplers and clamp diodes and not a "contact bounce elimiator" chip. If you happen to be designing for an installation where isolation is not needed the good old DS1489 chip makes for a VERY cheap x4 input circuit!

Peter and I seem to desire to use somewhat different software approaches. You have seen mine in conjunction woith the Puzzler #2 that I posted here last week. You can see the C code version of my x8 input filter/debouncer and edge detector.

I also want to agree with Peter and thus correspondingly disagree with the others that doing discrete input filtering/debouncing and edge detection in software is a very efficient process if it is coded properly. For example, if you look at the assembly language version of the code for my version of the software based input filtering and edge detection routine you will note a subroutine that is meant to be called periodically from a timer interrupt. This routine is able to provide filtering and detection for eight (8) inputs and keep the status in data RAM variables for ready access by any main line application code running on the processor.

I wanted to show just how efficient this process can be so I put the this assembler code into a spreadsheet and totaled up the number of clock cycles needed to run this algorithm. I did the analysis using a filter that is cycled at a 100 Hz rate using a rolling filter that is four samples deep for a net 25 Hz bandwidth on the signal filtering and edge detection. (You can view the full Excel spreadsheet here).

Here is a summary of the results for two different processor configurations:
Processor      Frequency   Total Clocks  % Utilization 
Intel 87C51FA     12 MHz   744 @ 100 Hz       0.620 %
Cygnal C8051F226  25 MHz    96 @ 100 Hz       0.038 %


There you go...

Michael Karas





List of 22 messages in thread
TopicAuthorDate
switch debounce - max 6818            01/01/70 00:00      
   RE: switch debounce - max 6818            01/01/70 00:00      
      RE: switch debounce - max 6818            01/01/70 00:00      
         RE: switch debounce - max 6818            01/01/70 00:00      
            RE: switch debounce - max 6818            01/01/70 00:00      
            RE: switch debounce - max 6818            01/01/70 00:00      
               RE: switch debounce - max 6818            01/01/70 00:00      
                  RE: switch debounce - max 6818            01/01/70 00:00      
                     RE: switch debounce - max 6818            01/01/70 00:00      
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               RE: switch debounce - max 6818            01/01/70 00:00      
                  RE: switch debounce - max 6818            01/01/70 00:00      
                     RE: switch debounce - max 6818            01/01/70 00:00      
                        RE: switch debounce - max 6818            01/01/70 00:00      
   RE: switch debounce - max 6818            01/01/70 00:00      
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      RE: switch debounce - max 6818            01/01/70 00:00      
         RE: switch debounce - max 6818            01/01/70 00:00      
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                  RE: switch debounce - max 6818            01/01/70 00:00      
                     RE: switch debounce - max 6818            01/01/70 00:00      

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