PCI, among others, uses level triggered interrupts. The way to deal with level-triggered interrupts is that you have to latch them. In other words, you have to ensure that the interrupt remains asserted until it is cleared by the ISR. It requires more hardware (a simple clearable flip-flop will work) but if you can't afford to miss an interrupt, it's all you can do.

Of course, this doesn't help you if by the time you get around to servicing the interrupt, you've missed the condition that made the interrupt necessary.



Yes, indeed!

-a