Yes. That's why Professionals use a two-transistor double-inverter.
In fact, if you take a normal Schottky, at 50uA (which is the input low current of 2051) the voltage drop will be barely more than 0.2V (I don't have a collection of datasheets on these, just a quick glance to some BAT5x having guaranteed max. 240mV at 100uA) which gives you a - hopefully comfortable - 0.3V noise margin anyway here... But who knows, maybe this is not enough, as ground bounces might be really significant in this state-of-the-art circuit, capable of switching at around 1MHz rate...
Kai, tell me, how much do you think is the worst case LSTTL noise margin... And also note, that even the coolest professionals DO use diode-resistor logic even if they are not aware of doing so (look at the TTL-LS gates' input stages).

But of course, for rocket science the two-transistor solution is better.

Sorry for being a little bit emotional but as I said I don't think THIS is a matter which needs more attention and hair-picking.

Jan Waclawek


PS. Kai, you might be confused by using diode-resistor networks with significant current flow (in oder of 10mA) e.g. loaded by (multiple inputs of) conventional TTL, where the voltage drop even on Schottky diode can be as high as 0.5V - that just eats up the noise margin you could have. But this is CMOS...