| ??? 10/16/06 21:31 Modified: 10/16/06 21:33 Read: times |
#126539 - go back to school, Erik! Responding to: ???'s previous message |
Erik Malund said:
Richard Erlacher said:
Since your driver firmware gets to determine how long the MCU's port pins are high and low, it need have nothing at all to do with how fast or slow the MCU is, nor need it have anything to do with how fast or slow the "antique" is. are you mixing cement in a futile attempt to cast your faulty arguments in concrete, because you ARE MIXING I/O mapped and memory mapped 805x has NO I/O-mapped anything! Everything is memory-mapped, including the ROM, the iRAM, the XRAM, and the SFR's. The SFR's are as close as it gets to anything I/O mapped, but, since SFR-space is memory-mapped and that's where the ports live ... Well, even you must get it by now. Erik Malund said:
Richard Erlacher said:
I suggest you read the datasheets and familiarize yourself with how 805x devices work. I suggest you do the same If internal memory uC, the 8255 has no purpose. If external memory, you can NOT use port pins for !RD and !WR on the blasted antique since P0 will wiggle up and down during the "port pin generated 8255 !RD and !WR". Erik The nRD and nWR signals are only relevant with applications using external memory and, of course, memory-mapped I/O. That's not the case here. The MCU's nRD and nWR are on P3.6 and P3.7. Nobody's using external memory reference instructions, and those are what cause nPSEN, nRD, and nWR. If you're talking over the port you've decided to use as the data bus, in this case, P2, what's the relevance of P0? ... and what do you mean, "...has no purpose?" RE |
