Right, and you, ESPECIALLY YOU, shouldn't start preaching right away in any context, about how the O/P shouldn't do one thing or another, until AFTER you've explained exactly how he can do what it is he's asked about. Your typical, I don't know how to do that, so you shouldn't consider it!" response won't do. Your all-too-frequent, "You should <do this> which I don't know how to do either, but it sounds better to me." response isn't appropriate either.



Yes, and when you provide alternatives, you should be specific, i.e. provide real part numbers, not hand-waves about a WSI-chip. (BTW, I've not found any distributors that stock the ST PSD-series, but the one and only that I found that lists it lists the PSD813F2A-90 with 128K Flash, 2K SRAM, and "4" ports providing 27 bits of I/O, at $8.9250 in 25-lot minimum quantity. No vendor had stock, and no vendor was willing to sell fewer than 25 units. Delivery was 6 weeks ARO.)



He should be directed to a FAQ-set or other sets of existing doc that will answer his question. It doesn't help him to say his approach is ancient, or wrong, since his professor won't let him use that as an excuse for doing something he wasn't assigned. After all, he often merely has to offer a reasonable approach, perhaps reflected in a schematic. He often doesn't have to build the circuit in most cases. Of course, the "solution" offerred has to be implementable for the benefit of the few who actually do need to implement it. implementable means (a) it has to fit in their application, (b) it has to be obtainable where they are, and (c) it has to work with their particular MCU.



Now here's where you go off-the-rails. Since the "manually controlled" pins are completely out of synchronization with the P0 (data bus) if you use an external memory reference instruction, that approach won't work at all. You have to use explicit control over all the ports and port bits that are used for operating an entirely external device if you don't use a completely "external memory mapped" approach. Since the 805x has no features allowing I/O mapped ANYTHING, which was, perhaps, a dreadful omission, but now is an accomplished fact, you have to choose between "external-memory-mapped" peripheral interfacing, with which you can rely on synchronized well-defined behaviors of P0 and nPSEN, nRD, and nWR, or discrete port-bit-mapped peripheral interfacing in which case you discretely control everything oin firmware.



What has one to do with the other?

If you have 64KB of on-board code space, you can't have more than that in a "normal" 805x anyway. If you have an I/O pin shortage, that's what you have. It could be because you need to use both serial ports, the timer and interrupt pins as timer and interrupt pins rather than as GPIO's.

If a fellow wants to use an external memory bus, he has to ensure that his particular peripherals can meet the timing restrictions imposed by the specific MCU he's using. He needs to know what the external memory bus timing is, and I'll be most newbies don't know that.



It would be REALLY HELPFUL if you'd list the ones that fit in a DIP-40 or PLCC-44 package, which is what most newbies/students have on hand. Remember, nobody asking about this matter is likely to build a PCB.

RE