??? 10/18/06 18:20 Read: times |
#126689 - Erik, Once again, you've brought too much to Responding to: ???'s previous message |
and taken too little from the discussion.
You've brought too many preconceived notions about what was being said, and failed to read what was said. Erik Malund said:
Richard Erlacher said:
I don't know exactly what you mean by "get it in" but if you mean transfer the data to/from the peripheral, keep in mind that you have to do that with the IIC as well. no, you don't. There is no 'raise the clock', 'lower the clock' required, all that is handled by the hardware. There's none of that in the case I described either, as the MCU controls the bus steering and timing. It IS the memory-mapped case, you know. Erik Malund said:
Richard Erlacher said:
you have to select the 805x DIP or PLCC-44 drop-in that will meet your requirements. Why in hades do you need a "drop-in". If you need to do so, that implies that you did not think when you designed in the first place but ran out of steam, beacuse you had no idea what the requirements would be. Well, since I'm build three of something, I'm using a COTS board rather than having someone build a hundred for me. The result is that (a) I have to use the MCU that's on the board, and (2) it has to have sufficient prototype area so I can put on the hardware that I need, because most boards don't have it. Erik Malund said:
Richard Erlacher said:
As for the port-mapped approach and bit-banging the controls, if you set the select and read tags you have to kill some time, assuming you're running at, say, 50 MHz or better, and while you're killing time, you can save the previous or fetch the next byte, bump the DPTR, etc. you like to accuse me of not reading. If you read my post, whey do you repeat, as a suggestion, the exact sequence I used. Erik I did read it, as far as where it said you couldn't transfer data any faster than ~100kBps. I submit that you, with your 100 MIPS MCU, could certainly do that if you wrote the code in anything other than the slowest most clumsy way conceivable. RE |