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???
02/02/07 20:11
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 		 #131940 - so why ...
Responding to: ???'s previous message
Tom Paden said:
And now, for the answer from NXP tech support:
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Hello Tom,
For external resets with external crystals, the reset should be long enough for the oscillator to start up (typically 10ms)
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For the LPC9xx series, the oscillator start up spec is under the section titled "Oscillator Clock (OSCCLK) wake-up delay" in the User Manuals. For external crystals it's 992 OSCCLK cycles plus 100us. For internal RC or watchdog oscillator, it's 224 OSCCLK cycles plus 100us.

For my 11.0592MHz external crystal, that's well under 1ms, so the tech's response of 10ms is more than enough.


So why isn't that info in the data sheet!

-a




List of 39 messages in thread
TopicAuthorDate
min reset width?            01/01/70 00:00      
   WHY            01/01/70 00:00      
      why?            01/01/70 00:00      
      Which reset chip, and how long a pulse?            01/01/70 00:00      
      "proper supervisor"?            01/01/70 00:00      
         so why ...            01/01/70 00:00      
            Data Sheet vs User Manual            01/01/70 00:00      
               Data Sheet vs User Manual            01/01/70 00:00      
               wherizit?            01/01/70 00:00      
                  Which uP are you looking at?            01/01/70 00:00      
                     P89LPC932A1            01/01/70 00:00      
                        Hey! Where'd you get Rev 2?            01/01/70 00:00      
                           That's it: I said, it is not in the datasheet/UM!            01/01/70 00:00      
                              Webmaster? They have a webmaster?            01/01/70 00:00      
         Only at 5V...            01/01/70 00:00      
         words, words            01/01/70 00:00      
   Does it not have an internal Reset circuit?            01/01/70 00:00      
      now THIS is a BAD documentation            01/01/70 00:00      
         Does it imply            01/01/70 00:00      
            infernal reset (not a typo!)            01/01/70 00:00      
               So, what's the "right" way?            01/01/70 00:00      
                  don't use it as a port pin            01/01/70 00:00      
                     It's not a pitty but a shame!            01/01/70 00:00      
                        it's "creeping feature"-ism            01/01/70 00:00      
                           not a waste            01/01/70 00:00      
         Yes, I remember those many complaints!!            01/01/70 00:00      
         And what about...            01/01/70 00:00      
            internally timed            01/01/70 00:00      
               I LOVE it            01/01/70 00:00      
                  OK so let's vote            01/01/70 00:00      
                     no voting, please            01/01/70 00:00      
                        this is not taste, but facts            01/01/70 00:00      
   So, how's one supposed to reset this thing?            01/01/70 00:00      
   lets see...            01/01/70 00:00      
      Yes, but what's REQUIRED?            01/01/70 00:00      
   Some results            01/01/70 00:00      
      with or without the reset chip?            01/01/70 00:00      
         now with the reset chips            01/01/70 00:00      
            and the troubles were BEFORE or AFTER?            01/01/70 00:00      

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