Hi Jan,

here are some examples, how two caps in parallel will interact with another.


In the following picture you can see, what happens when a 100nF ceramic cap is paralleled by 1nF ceramic cap. Both caps are through hole types. The green curve is the 100n cap allone, the red curve shows the parallel impedance of both:



You can clearly see the red peak at about 50MHz. Such a peak is highly unsuited for a decoupling scheme, because at the peak's frequency the decoupling heavily suffers, due to the high impedance. Critical applications show a ringing or even oscillation right at this frequency!
Decoupling schemes shall provide a low ohmic path to signal ground for a wide spectrum of frequencies. Impedance peaks are heavily unwanted.


The situation becomes even worse, when a 100nF mica cap is used, which is called to be "better" due to the lower ESR (equivalent series resistance). The result is an even higher peak. The red curve is the 100nF mica cap paralleled by 1nF ceramic cap. The green curve shows the performance of 100nF ceramic cap as a reference:




The next picture shows as red curve the 100nF ceramic cap paralleled by 1nF ceramic cap from above (first picture) compared to a modern 10µF/10V X5S high cap (Taiyo Yuden) in 0805 SMD package (green curve).



Look, what a drastical improvement the high cap presents!


The next picture shows the mistake you can make when "improving" the decoupling properties of an electrolytic. The green curve shows the 220µF/25V electrolytic paralleled by 470nF ceramic. The red curve shows the same electrolytic but paralleled by a 10nF ceramic cap.




Kai