I have a problem with data corruption in a FIFO chip.

The circuit receives data from an A/D converter and stores it in the FIFO. When the FIFO is half full the data is written to a harddrive. The circuit is controlled by a SAB-C501 running on 11.0592MHz.

The data arrives in serial form from the A/D, and is converted to 16-bit parallel form by two cascaded HC595 shift registers. Two IDT7202LA35J FIFOs are connected to the output of the registers. I use the RCO output of a HC163 4-bit counter to generate the register write pulses for the 595s as well as the write pulses for the FIFOs.

The outputs of the FIFOs are connected to the IDE bus.

The HF' output of one of the FIFOs is monitored by the controller. When the pin goes low, the data is transferred to the harddrive using the write pulses of the controller. The controller writes 512 times transfering 2 sectors (1024 bytes) of data. The write signal is connected to both the WR' pin of the harddrive and the R' pin of the FIFOs.

This setup probably sound a bit complicated/strange, but it does work - almost. Sometimes one byte of data "disappears". Each sample from the ADC consist of 32 bits where the last 8 are always zeroes. The problem originally affected the first or third byte in the samples. Occasionally a single byte was missing, making the data quite useless. I then tried reversing the order of the 595 registers, and now the problem affects the second or fourth byte. This also makes the problem easy to spot as the fourth byte has to be 0x00.

So what is the problem? As I see it either a byte fails to get written to the FIFO, or two bytes sometimes get read instead of one. But why? The read and write pins of the two FIFOs are connected, so why does this only affect one of them? I would love some debug/diagnosis suggestions!

Best regards,

Mikkel C. Simonsen