| ??? 01/11/04 23:36 Read: times |
#62379 - RE: FIFO problem Responding to: ???'s previous message |
Thanks for your reply.
I don't think a glitch on the RCO output could cause this problem in one of the FIFOs, as they are not controlled by the RCO signal directly. I use an MMV to generate a short(ish) write pulse, as the FIFO datasheet recommended against using long write pulses. Instead of trying to explain the complete circuit, I have cut out the relevant parts here: http://stiftsbogtrykkeriet.dk/~mcs/FIFO.gif The flip-flop U11A is used to enable/disable the counter so the data collecting process can be controlled. The clock for U11A is a sync signal that indicates the start of a new sample. U7A and B are used enable/disable the FIFOs, so that it's possible to write to the harddrive without getting FIFO data on the bus. Best regards, Mikkel C. Simonsen |
| Topic | Author | Date |
| FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 | |
| RE: FIFO problem | 01/01/70 00:00 |