The reason that you find a gradual failure when trying to overclock these things is basicaly down to the time delay in the longest paths throught the logic and obviosly things like the multiplier have far longer critical paths than something like a simple shift register,so you dont meet the setup and hold time of a small subset of registers.in devices where the time delay through the logic are all very similar then the failure occurs later when you fail to meet the setup and hold times of almost all the registers at the same time.