If you are a complete sadist then you can mix the two.
Verilog is an 'alternative' to VHDL used mainly in the US and far east for some reason, and its much less powerful which regard to design abstraction.VHDL is very closly related to ada95,and can support very high levels of design partition and abstraction.I don't know what verilog is related to.Its a bit of a mystery why there is a geographical seeperation of verilog and vhdl users.