??? 06/18/05 07:41 Read: times |
#95248 - why not look.. Responding to: ???'s previous message |
At the 51 core in the code library which is pipelined and runs at 1 clock per instruction(most of the time?)
You wont get much change out of $5000 for a fast core from a commercial vendor.As for which fpga to use ive had that core running at 80 Mhz in a xilinx spartan which costs £25. As far as verifiction is concerned ive written a testbench which tests every instruction in modelsim and gives a pass/fail result. Ive also written a perl script which looks at your assembly code and adds/removes hardware from the core as and when its needed so if for example you have a program in mind that you want to run on a fast processor and it doesnt use any divisions then the hardware division unit isnt compiled into the fpga saving space in the fpga and improving clock rate. |
Topic | Author | Date |
ASIC '51s and speed | 01/01/70 00:00 | |
Zylogic? | 01/01/70 00:00 | |
probably not | 01/01/70 00:00 | |
why not look.. | 01/01/70 00:00 | |
Details please? | 01/01/70 00:00 | |
Details | 01/01/70 00:00 | |
T51 limitations | 01/01/70 00:00 | |
t51 limitations,not quite | 01/01/70 00:00 | |
so running from RAM | 01/01/70 00:00 | |
TCL and all that | 01/01/70 00:00 | |
other case, probabl same answer | 01/01/70 00:00 | |
very interesting! | 01/01/70 00:00 | |
Advantages of single-chip | 01/01/70 00:00 | |
Fundamental flaw | 01/01/70 00:00 | |
Final thought | 01/01/70 00:00 | |
use two | 01/01/70 00:00 | |
better one superfast | 01/01/70 00:00 | |
Pitfall? | 01/01/70 00:00 | |
Multi cpu pitfalls | 01/01/70 00:00 | |
Hardware delegation? | 01/01/70 00:00 | |
2 questions | 01/01/70 00:00 | |
Why are you obsesed with zylogic? | 01/01/70 00:00 | |
Obsessed? moi! | 01/01/70 00:00 | |
well | 01/01/70 00:00 | |
Thanks, but no thanks | 01/01/70 00:00 | |
uPSD | 01/01/70 00:00 | |
sorry, no | 01/01/70 00:00 | |
FYI - Hitex 8051 SoC kit | 01/01/70 00:00 | |
nice, will check![]() | 01/01/70 00:00 |