| ??? 06/20/05 16:09 Read: times |
#95371 - TCL and all that Responding to: ???'s previous message |
I was thinking about adding as isp function and that could be done quite easily but it would have to use an external serial flash which would be read by the fpga as fpga's are sram based and configured at power on from thier own flash which is usualy a serial device.
The pipeline has some very surprising effects which are not easy to quantify so ive started work on a virtual simualtor which has a better front end for watching programs run on the core,it hooks into the tcl interface on modelsim so you dont have to know anything about using modelsim to be able to simulate your program running |
| Topic | Author | Date |
| ASIC '51s and speed | 01/01/70 00:00 | |
| Zylogic? | 01/01/70 00:00 | |
| probably not | 01/01/70 00:00 | |
| why not look.. | 01/01/70 00:00 | |
| Details please? | 01/01/70 00:00 | |
| Details | 01/01/70 00:00 | |
| T51 limitations | 01/01/70 00:00 | |
| t51 limitations,not quite | 01/01/70 00:00 | |
| so running from RAM | 01/01/70 00:00 | |
| TCL and all that | 01/01/70 00:00 | |
| other case, probabl same answer | 01/01/70 00:00 | |
| very interesting! | 01/01/70 00:00 | |
| Advantages of single-chip | 01/01/70 00:00 | |
| Fundamental flaw | 01/01/70 00:00 | |
| Final thought | 01/01/70 00:00 | |
| use two | 01/01/70 00:00 | |
| better one superfast | 01/01/70 00:00 | |
| Pitfall? | 01/01/70 00:00 | |
| Multi cpu pitfalls | 01/01/70 00:00 | |
| Hardware delegation? | 01/01/70 00:00 | |
| 2 questions | 01/01/70 00:00 | |
| Why are you obsesed with zylogic? | 01/01/70 00:00 | |
| Obsessed? moi! | 01/01/70 00:00 | |
| well | 01/01/70 00:00 | |
| Thanks, but no thanks | 01/01/70 00:00 | |
| uPSD | 01/01/70 00:00 | |
| sorry, no | 01/01/70 00:00 | |
| FYI - Hitex 8051 SoC kit | 01/01/70 00:00 | |
nice, will check | 01/01/70 00:00 |