Perhaps someone could put forth a rigorous definition of "clock biting."

an exaggerated case

clock should be

  ----         here bite
    ---     ---     ---     ---     ---     ---     ---     --- 
___|   |___|   |___|   |___|   |___|   |___|   |___|   |___|

but due to the nalog nature of a clock another oscillator interfer and you get
    ---     ---      --     ---     ---     ---     ---     --- 
___|   |___|   |____|  |___|   |___|   |___|   |___|   |___|

This, of course has no effect if duty cycle is of no concern, but chopper-stabilized OP-amps are very duty cycle sensitive.

Erik