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???
08/19/07 15:19
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 		 #143403 - I have to agree ...
Responding to: ???'s previous message
Erik Malund said:
..... will, indeed tell you that things are going awry.

However, what guarantee do you have that the uC will not emit any signals when 'going dead' ?

Nobody will have any trouble to stop writing on an early power fail interrupt, but, as far as I can see, the REAL problem is "what comes out of the micro when it goes into reset".

My point, exactly, and particularly in the case where Vcc decays slowly enough to allow the errant MCU to misbehave for a long time!

I'd even suggest that instead of read after write, you connect the 'early' supervisor for the BBRAM to an interrupt, then you will not need read after write. That way you have a fully protected BBRAM AND an "early power fail interrupt". Yes, you can have your cake and eat it too.

I don't really see how this will solve any problems. If the BBRAM locks its writes at one point in the decay, and the MCU interrupts out in response to brownout or power-down, there's still no guarantee that they're "on the same page."

This is slowly coming back from the dusty archives in my DNA computer.

Erik





List of 39 messages in thread
TopicAuthorDate
the mysterious data loss in BBRAM            01/01/70 00:00      
   I just used the Dallas parts!            01/01/70 00:00      
      I've heard only praises to the Dallas chips, too..            01/01/70 00:00      
         I agree re Dallas            01/01/70 00:00      
            another method            01/01/70 00:00      
               I don't understand            01/01/70 00:00      
                  nah            01/01/70 00:00      
                     ... I just would expect that..            01/01/70 00:00      
                        You are absolutely right, of course!            01/01/70 00:00      
                     You should dig deep when posting here!            01/01/70 00:00      
                        nope, but ...            01/01/70 00:00      
                           But, what if your post is just wrong??            01/01/70 00:00      
                              well, it was not            01/01/70 00:00      
                                 What has this to do with Jan's application??            01/01/70 00:00      
                                    everything            01/01/70 00:00      
                                       When you use a second supervisor chip, ...            01/01/70 00:00      
                                          it does - IF            01/01/70 00:00      
                                             For occasional writes you have the FLASH            01/01/70 00:00      
                                                this depends on application, too            01/01/70 00:00      
                                                   But why??            01/01/70 00:00      
                                                      early power fail interrupt .....            01/01/70 00:00      
                                                         this is the purpose of reset            01/01/70 00:00      
                                                            Sadly, there's no guarantee it does that!            01/01/70 00:00      
                                                               ensure the same voltage on mcu and RAM/supervis            01/01/70 00:00      
                                                               yeah, sure            01/01/70 00:00      
                                                            OK, once more            01/01/70 00:00      
                                                               given a proper ground and power plane ...            01/01/70 00:00      
                                                         I have to agree ...            01/01/70 00:00      
                                             this depends on application            01/01/70 00:00      
                                             There's room for doubt ...            01/01/70 00:00      
                                       thanks            01/01/70 00:00      
                                 sounds reasonably            01/01/70 00:00      
   Pull-downs at inputs of battery powered CMOS-RAM            01/01/70 00:00      
      Observation technique affects the outcome            01/01/70 00:00      
         Some comments and two questions            01/01/70 00:00      
   Designing a pre-test environment ...            01/01/70 00:00      
      Eager to hear the results!            01/01/70 00:00      
         You'll have to be patient ...            01/01/70 00:00      
   Has anyone tried THIS?            01/01/70 00:00      

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