| ??? 08/19/07 18:36 Modified: 08/19/07 18:38 Read: times |
#143410 - Some comments and two questions Responding to: ???'s previous message |
Richard said:
I'm persuaded that it isn't a good idea to bias nWE and nCS in the negative direction, as we don't know what the behavior of the associated logic will be as Vcc falls. Heaven, no! I thought it's obvious enough, that I meant the data and address lines only! Richard said:
Also, if one's trying to discern the behavior of the MCU or BBRAM in this context of falling Vcc, affecting the bias on addresses and data may be disadvantageous in determining the actual behaviors of these components. I'm not sure of that, but with larger resistor values, there may be less risk of losing valuable information (not the memory content, but the way in which it is altered, if at all). The idea is, that a high on a /CS line is enough to totally block the BBRAM, even when Vcc falls down to the back-up potential. So, I don't think that the pull-downs on the address and data lines do any harm and I never observed such. Richard said:
I'd guess that 1 Meg or even 10 Meg resistors would do the job. Depends. I took the 1µA maximum leakage current specification. 1µA times 100kOhm is just 100mV, which is still "CMOS level" (<200mV) and prevents any drastical rise of supply current. Richard said:
Wildly fluctuating power consumption is not so likely to produce the fault that is being sought out, since it's in a situation in which power is decaying anyway. Yes, I agree. This above issue, namely the increase of supply current due to "insane" potentials at the address and data lines is hardly the explanation for the strange and occasional data losses you reported. Nevertheless, it might be wishable to know, why that stupid battery is totally down again... A question at the end: Did you observe this data loss with different candidates of BBRAMs or is it a single event? Also, did you ever experiment with a self constructed backup RAM, using a 62256, or similar? Kai |
