??? 08/21/07 12:55 Read: times |
#143452 - OK, once more Responding to: ???'s previous message |
the voltages are 'examples'
Say you have an uC and a BBRAM that is guaranteed to work at your clock speed from 2V7 to 3V3 and your power supply is 3V3. You then connect a 3V1 supervisor to the BBRAM CE and an interrupt pin on the uC. So at 3V1 and below the BBRAM is dead and the uC is notified. then you attach a 2V9 supervisor to the uC. That way, whatever the uC does in (going into) reset will not affect the BBRAM. NOTE this ONLY works with BBRAMs with 2 CE inputs, if you insert an OR gate (wired OR will work) all bets are off. There is a catch here if the power decoupling is not making both chips (and their supervisors) drop identically, you need make it so. Erik |