??? 09/30/08 05:35 Read: times |
#158672 - Interrupts are slower than tight polling Responding to: ???'s previous message |
You have to think about the size of your message, and how many messages / second to know bitrate. Also - if you have to do it in software, then you have to figure out how large percent of the processor capacity that may be spent with the communication.
Interrupts doesn't make the slave react faster, since each interrupt has overhead. To get max speed of the slave implementation, the slave may use an interrupt to react to the slave-select line, but should then deactivate all interrupts and switch to polling mode. You can't beat polling in regards to fast reaction to a switched signal state. But for max speed, the slave can not allow any interrupts when communicating since the time needed for the interrupt affects the shortest allowed time the SPI clock may be in low or high state and the slave still have time to detect the clock change and either read the received data before the master removes it, or put out one bit of data for the master and have the outgoing signal line (MISO) stabilize before the master samples it on the next phase change of the clock. |
Topic | Author | Date |
SPI slave | 01/01/70 00:00 | |
high speed? | 01/01/70 00:00 | |
sory for late replay. | 01/01/70 00:00 | |
SPI clock | 01/01/70 00:00 | |
not sure.. | 01/01/70 00:00 | |
the worst possible approach | 01/01/70 00:00 | |
SPI Slave Response | 01/01/70 00:00 | |
further explanation? | 01/01/70 00:00 | |
Fixed speed | 01/01/70 00:00 | |
SPI Timing Diagrams | 01/01/70 00:00 | |
UART Mode 0 - SPI like Serial Shif register | 01/01/70 00:00 | |
uhm | 01/01/70 00:00 | |
to joe | 01/01/70 00:00 | |
your point? | 01/01/70 00:00 | |
you can't fail with software master | 01/01/70 00:00 | |
Unanswerable! | 01/01/70 00:00 | |
really? | 01/01/70 00:00 | |
Intended for/usable for not always identical | 01/01/70 00:00 | |
consideration? | 01/01/70 00:00 | |
Some Questions | 01/01/70 00:00 | |
whichever you choose | 01/01/70 00:00 | |
low cost? | 01/01/70 00:00 | |
if you do not use an interrupt | 01/01/70 00:00 | |
polling? | 01/01/70 00:00 | |
bits/s not packet size | 01/01/70 00:00 | |
speed? | 01/01/70 00:00 | |
bits/s not packet size! | 01/01/70 00:00 | |
500ms? | 01/01/70 00:00 | |
here | 01/01/70 00:00 | |
Yes - I agree | 01/01/70 00:00 | |
issues | 01/01/70 00:00 | |
UART! | 01/01/70 00:00 | |
Not complex - just requiring low baudrate | 01/01/70 00:00 | |
kind of rcorrect | 01/01/70 00:00 | |
Complexity contra recommendable | 01/01/70 00:00 | |
answer | 01/01/70 00:00 | |
as i said | 01/01/70 00:00 | |
lots of them | 01/01/70 00:00 | |
mcu with spi, right here in the thread![]() | 01/01/70 00:00 | |
CodeArchitect. ? | 01/01/70 00:00 | |
no | 01/01/70 00:00 | |
ahhh | 01/01/70 00:00 | |
simulating SS? | 01/01/70 00:00 | |
Interrupts are slower than tight polling | 01/01/70 00:00 | |
wow | 01/01/70 00:00 | |
all about worst-case | 01/01/70 00:00 | |
thanks... | 01/01/70 00:00 | |
missed interrupts | 01/01/70 00:00 | |
correct me.. | 01/01/70 00:00 | |
Fast interrupts | 01/01/70 00:00 | |
thanks... | 01/01/70 00:00 | |
An Alternative... | 01/01/70 00:00 | |
Some Descriptive Information | 01/01/70 00:00 | |
AT89LP2052 has HW SPI | 01/01/70 00:00 |