Since you seem to want to consider doing an MCU to MCU communications link with software and just a couple of wires between the two then there is another scheme to consider. Instead of using SPI with its open ended clocking from Master to Slave there is another scheme that I have used countless times that is completely rate adaptive between the two. I've designed the adaptive interface into PC to PC applications, PC to MCU, MCU to MCU, and PC to custom hardware in FPGA. Rate adaptive transfer is nice to use because it is even possible to go out to incredible cable lengths (as long as suitable hardware interface is used) and the communications can still function correctly.

There can be variations to the implementation scheme but the most straight forward one is to have two lines used for handshaking and two more for data bits transfer. Signal directions are one handshake line each way and one dara line each way. The master signals to slave that a data bit is ready by putting a bit on its data line and the changing the state of the handshake line. The slave eventually sees the handshake line level change and takes in the data bit from the data line. The slave answers back "got that bit" by then toggling the state of the return handshake line. The master does not take action for the next bit until it has recognized the return handshake line state change. Thus the handshake for each bit is complete and interlocked. It is possible in the scheme for the slave to return data back to the master by placing that data on to the return data line before toggling the return data line.

Transfers can be synchronized through use of a separate slave select wire or the two handshake lines can be defined to be in an idle state when both high or both low and then a special starting signal pulse can be used to signal start of transfer.

Michael Karas