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???
10/03/08 07:52
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#158791 - missed interrupts
Responding to: ???'s previous message
If you don't service an interrupt in time, you normally get:
- lost data (buffer overrun, buffer underrun)
- lost timer ticks

Of course interrupt latencies matter. You can't run your processor to hard - you must guarantee that when every little thing adds up, the processor is still fast enough to service each interrupt within the required minimum time (and definitely until the next interrupt from the same sources) and still have enough time to do the "main" tasks enough times/second for your requirements.

If you work ad a McDonalds you must be able to make new burgers at least as fast as the order desk can take up the orders. If not, you will either get a growing queue of back-orders, or you will start to loose orders.

Same thing with the order desk. They must also be abke to service arriving customers at the same speed as new customers arrives. If they can't, then the queue will grow and you will loose customers that will turn in the door.

It is your job to figure out all the timing requirements of your program. And it is your job to figure out if your software implementation fulfills all these requirements. And it is the people who requested the product who may add rules that some specific events may possibly be dropped to prioritize other things. But without explicit documentation that some events may be dropped, the design must be made with the assumption that no events may evern be dropped.

List of 54 messages in thread
TopicAuthorDate
SPI slave            01/01/70 00:00      
   high speed?            01/01/70 00:00      
      sory for late replay.            01/01/70 00:00      
         SPI clock            01/01/70 00:00      
            not sure..            01/01/70 00:00      
               the worst possible approach            01/01/70 00:00      
                  SPI Slave Response            01/01/70 00:00      
                     further explanation?            01/01/70 00:00      
                        Fixed speed            01/01/70 00:00      
                        SPI Timing Diagrams            01/01/70 00:00      
                           UART Mode 0 - SPI like Serial Shif register            01/01/70 00:00      
                              uhm            01/01/70 00:00      
                           to joe            01/01/70 00:00      
                  your point?            01/01/70 00:00      
                     you can't fail with software master            01/01/70 00:00      
   Unanswerable!            01/01/70 00:00      
      really?            01/01/70 00:00      
         Intended for/usable for not always identical            01/01/70 00:00      
            consideration?            01/01/70 00:00      
   Some Questions            01/01/70 00:00      
      whichever you choose            01/01/70 00:00      
         low cost?            01/01/70 00:00      
            if you do not use an interrupt            01/01/70 00:00      
               polling?            01/01/70 00:00      
                  bits/s not packet size            01/01/70 00:00      
                     speed?            01/01/70 00:00      
                        bits/s not packet size!            01/01/70 00:00      
                           500ms?            01/01/70 00:00      
                        here            01/01/70 00:00      
                           Yes - I agree            01/01/70 00:00      
                              issues            01/01/70 00:00      
                                 UART!            01/01/70 00:00      
                              Not complex - just requiring low baudrate            01/01/70 00:00      
                                 kind of rcorrect            01/01/70 00:00      
                                    Complexity contra recommendable            01/01/70 00:00      
                                       answer            01/01/70 00:00      
                              as i said            01/01/70 00:00      
                                 lots of them            01/01/70 00:00      
                                 mcu with spi, right here in the thread            01/01/70 00:00      
                           CodeArchitect. ?            01/01/70 00:00      
                              no            01/01/70 00:00      
                                 ahhh            01/01/70 00:00      
      simulating SS?            01/01/70 00:00      
         Interrupts are slower than tight polling            01/01/70 00:00      
            wow            01/01/70 00:00      
               all about worst-case            01/01/70 00:00      
                  thanks...            01/01/70 00:00      
                     missed interrupts            01/01/70 00:00      
                        correct me..            01/01/70 00:00      
                           Fast interrupts            01/01/70 00:00      
                              thanks...            01/01/70 00:00      
                                 An Alternative...            01/01/70 00:00      
                                    Some Descriptive Information            01/01/70 00:00      
   AT89LP2052 has HW SPI            01/01/70 00:00      

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