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11/16/05 18:19
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 		 #103818 - A very welcome "limitation", it allow th
Responding to: ???'s previous message
This would seem to be more of a limitation of the f12x or f02x
A very welcome "limitation", it allow the superfast 100MHz 1 clock pipelined architecture, (I belive that the internal flash is wider than 8 bits) which would be difficult to implement with external memory.

"The '51 is a Harvard device (separate code and data memory, you can not have code in the RAM."
Was prefaced with "As to the specific question:" which was specifically about the f12x.

Erik

Anyhow, these last posts should clear up that sometimes you can and sometimes you can't


List of 50 messages in thread
TopicAuthorDate
8051/8052 development boards for newbies            01/01/70 00:00      
   SiLabs            01/01/70 00:00      
   80c552 board from Tecel, Inc.            01/01/70 00:00      
      ROM Monitor?            01/01/70 00:00      
      uPSD3200            01/01/70 00:00      
         uPSD 32xx            01/01/70 00:00      
            prjc board            01/01/70 00:00      
               I suggest SILabs f12x devboard            01/01/70 00:00      
                  SiLabs f12x            01/01/70 00:00      
                     yes            01/01/70 00:00      
               PJRC            01/01/70 00:00      
   8052.com SBC            01/01/70 00:00      
      no offense, but since the 8052 SBC does            01/01/70 00:00      
         Counterpoint            01/01/70 00:00      
            I have always either worked alone or for            01/01/70 00:00      
         ICE?            01/01/70 00:00      
   The ADuC814 board in the store            01/01/70 00:00      
      clarifications..(SiLabs f12x dev. board)            01/01/70 00:00      
         bible time            01/01/70 00:00      
            why not?            01/01/70 00:00      
            Not entirely correct            01/01/70 00:00      
               yes, but            01/01/70 00:00      
                  Limitations of SiLabs            01/01/70 00:00      
                     A very welcome "limitation", it allow th            01/01/70 00:00      
                        SRAM is fast            01/01/70 00:00      
                           WGASA            01/01/70 00:00      
                     Maybe that's not all needed ...            01/01/70 00:00      
                        flying blind?            01/01/70 00:00      
                           monitor vs. quasiICE            01/01/70 00:00      
                              monitor debugging            01/01/70 00:00      
                                 on monitors etc.            01/01/70 00:00      
                                    intrusive tools are worse than none            01/01/70 00:00      
                                       Depends            01/01/70 00:00      
                                          I do not know, but if code is volatile,            01/01/70 00:00      
                                             That's what I've heard            01/01/70 00:00      
                                       No such thing as non-intrusive            01/01/70 00:00      
                                          thanks            01/01/70 00:00      
                                             single stepping, breakpoints and ICE            01/01/70 00:00      
                                                Correct, but not that far from it            01/01/70 00:00      
                                                   ICE is different from "real life"            01/01/70 00:00      
                                                      breakpoints            01/01/70 00:00      
                                                      That is exactly why they have JTAG debug            01/01/70 00:00      
                                                   Personally, my approach...            01/01/70 00:00      
                                                      the problem with dumps            01/01/70 00:00      
                                                         Perhaps            01/01/70 00:00      
                                                            that is usually my case            01/01/70 00:00      
   SuperSet of SiLabs F12x board available            01/01/70 00:00      
      praveen            01/01/70 00:00      
         SuperSet of SiLabs F12x board available            01/01/70 00:00      
            how do you do that?            01/01/70 00:00      

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