Once upon a time, when i8085's still roamed the earth, there was an early version of the i805x which operated at 12 MHz. The 8755/8355 and 8155/56 worked "just fine" with that, as their tacc was on the order of 450 ns.

Somebody produced a version of BASIC52, which had to be externally tokenized and the tokenized code written to the executable space, in this context, the data ram (XRAM) of the 805x. This was widely sold and distributed in ROM form. Its low addresses were reversed, apparently because it facilitated board layout. This didn't matter because the latched addresses were fed directly to the ROM from the address latch. Other peripherals, e.g. the 8155, and/or the external data RAM both had their own data/address path, or, a separate external address latch, in this case necessitated not by the demands of the circuit, but by the fact that the addresses were wired as they were on that original PCB for which the ROM was designed.

Wiring external peripherals that required the address latch meant reversing/rearranging the address lines to the "correct" order, effectively reversing the rearrangement made by the designer of the ROM. It's been over 25 years since I saw that, but it still bothers me that people have trouble with it. The address arrangement is clearly documented.

Now that WE all know this, I wonder if it's still a mystery to the O/P. This ROM was published before there was a "Ciarcia's Circuit Cellar", i.e. in '78 or so, but not before there were hobby magazines like BYTE and KILOBAUD and they published some of this information. The MicroMint site has some history of Basic52, and this may be there, though I don't know that for certain.

In any case, I suspect that the problems he's having are related to that, and not necessarily to the fact he's using an 8155. The external 256 byte RAM will probably prove entirely inadequate, BTW.

RE