Ugh, I got bit by that, taking code from a '005 to a '314. At least I found the app note, but it was titled something like "using SMBus on small form-factor micros."

In the "jesus, this would be nice" category: an app note that clearly points out the differences in the I2C implementations, and which chips use which implementation. I think I'll submit a doc request to SiLabs.

Another "improvement" that's not obvious: SiLabs' older SPI implementations set aside NSS whenever you enable the SPI stuff. However, when you use it as a master, it's basically an "SPI enable" input to allow multimaster use. When it's an SPI slave, NSS is the slave-select input. However, as a master you need to use a fifth port pin as the output slave select.

The newer parts use the "Enhanced SPI interface," which adds a couple of slave-select mode bits in the SPI0 control register. This lets you configure the port as a 3-wire port (NSS isn't routed to a pin), a 4-wire port where NSS works like the older devices, and a 4-wire single-master mode where NSS is an output. More flexible, but you'd never know it if you searched through SiLabs' list of parts.

I'm not sure I like the idea of "see the Bible for the list of standard features, and here's where this chip deviates from the standard." It makes the data sheet into a big list of errata. Maybe if the data sheet for each chip simply pointed out the deviations? The first paragraph of, say, the timers section could say, "timer 3 is non standard."

-a