For starters, for performance reasons, we're not dealing with an 8052 chip, so your typical ICE is ruled out. Then, of course, there's almost nothing slower than JTAG "thingies", so those are always ruled out for real time work.

The thing that makes a debug monitor indispensible is that it will run in the unfettered hardware environment under test. I don't want to modify my hardware environment by adding connectors for external hardware, particularly since many of the signals don't see the light of day, being generated in a BGA and probably never emerging from the inner layers of the board. It's no problem, in the prototype, putting in a larger SRAM, since they all seem to live on the same footprint. It's my intention to put a debugger with the desired capabilities in SRAM and run it there, mapped into program space.

I can't justify all the compromises and procedural adjustments that simulators and commercial ICE's require, not to mention the cost, as I do not like ot use discrete microcontrollers unless it's absolutely required, e.g. by client demand. An ICE is just another piece of hardware to break down, require maintenance, particularly of the software, and often impedes progress as much as it helps. Goodness knows, I've got enough of them lying about, albeit only for MCU's that don't have an external memory interface. However, I've managed, since 1985, to do what 805x work I've had to do without one.

I'm not looking for a way to get around using a full-function resident debug monitor. For years, I've lamented that I have no such tool for the 805x. I'm trying to determine whether one already exists. It's not rocket science that's required to take one of the readily available, in source form, debuggers that has a disassembler in it, and add line-by-line assembly capability. I just don't want to do it if it's already been done. I've been asked to build a bridge between a 1970's generation HDC and current generation mass storage. Volume will not be large, since this is a freebie, probably not even large enough to warrant a PCB. It will probably be built on some FPGA prototyping platform, provided it's small enough. I just want to minimize the pain. The learning curve for yet another piece of test gear will be excessive. What I want is a resident debugger.

DE