Yes, you'd think so, but, while JTAG allows you to verify connections and test the state of various artifacts within a device, it (or at least the stuff I've got) doesn't do much for you the way and ICE or debug monitor would, i.e. allow you, in minutes, or seconds, respectively, depending on whether it's an ICE or a resident monitor, would do.

If you're trying to run a loop, you can, with an ICE, single-step through it, and, in fact, you can do that with JTAG, albeit much less elegantly, but with a debugger you can run an exercise loop and take a picture with a logic analyzer to show where signal quality might be an issue, or the like. It doesn't happen often, but it does come up.

Simulation, if the tools are any good at all, will enable one to examine the behavior of the code. A debug monitor, or, in most cases, an ICE, will enable one to take a picture of the signals "doing their thing." Internal examination of device artifacts via JTAG doesn't make it easy to run code, though.

I guess it comes down to what you mean by "test."

I personally don't consider debugging and testing to be, in any sense, the same thing.