JTAG (or more exactly, boundary scan) was originally meant as a "shell" for the chip, where the I/O lines is be "cut" and the boundary scan circuit is inserted between the "inner" and "outer", enablig to set and read the state of either one. Typical application was PCB testing (uilizing ly the "outer" connection) - that's where the "testing" gets related to JTAG. The "inner" conection has a rather limited use. Naturally JTAG was implemented usually on the most complex chips with high pin count such as FPGAs.

Later, JTAG started to be increasingly popular as a general serial interface, e.g. for xROM programming and as a debug interface. Quite naturally, when a softcore processor is implemented in an FPGA, its debug interface is designed utilizing JTAG. But, the debug option requires extra resources, and reduces speed. It is very similar to presence of the SW monitor/debugger in the program. So after debugging, it is better to use a JTAG-less version of the softcore for the production version.

Of couse, if the JTAG/debug circuitry is hardwired into a "hard"-mcu, one cannot get rid of it... But has limited or no use in testing itself.

Jan Waclawek