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???
11/06/07 20:38
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Msg Score: +1
 +1 Informative
#146700 - reset pulses?
Responding to: ???'s previous message
Farshad Mohajeri said:
Well, I am using an external watchdog since I don't trust much the internal WD. There is no way for the CPU to externally disable the watchdog.

While I am not an absolute fan of watchdogs and am convinced that their usage must be considered and that NOT using one IS an option, I would also prefer external watchdog over the mostly flawed internal ones, where security is more important than cost. After all, I've expressed already my credo in this regard in more than sufficient (and maybe more than bearable) length in the "reset" pdf (which I still did not finish).

And, Erik, a BADLY WRITTEN runaway code may kick an external dog as easily as a BADLY WRITTEN runaway code may kick the internal dog. Besides, if you strive for perfections, have you heard about window triggered watchdogs?

Farshad Mohajeri said:
In few cases I had chance to analyze the circuit with an oscilloscope and to my surprise while the Reset Pin(9) was being bitten by continuous external WD pulses (duty cycle of 10ms) the CPU was refusing to restart!


What is the duration of the reset pulse, then? And, have you verified that the clock is running? (on ALE, perhaps, or, with sufficient care (high impedance probe) directly on the crystal pins)

Farshad Mohajeri said:
I think it is a specific problem with ATMEL where under certain conditions the internal reset logic fails to monitor external reset requests.


While I don't claim there is no internal flaw in the logic in the said mcu, there are certainly also mechanisms how to kick a modern CMOS to - temporary or permanent - death. If, as a consequence of some strong pulse, some of the internal CMOS gates latches up (do you know this effect, Farshad?), that gate cannot perform its logic function anymore, and stays dead - either until power cycle, or permanently.

Just a remark - funnily, in CMOS you might fry _some_ of the transistors inside (in any way), and the logic (or most of it) may function normally, although for example the power consumption will be elevated, and such "half-dead" chip is certainly more prone to various obscure errors than a fresh one...

JW


PS. I am eagerly waiting Kai Klaas's comment, IIRC he mentioned subjecting Atmel '51s to strong EMI...


List of 88 messages in thread
TopicAuthorDate
Atmel 89 Series and EMI            01/01/70 00:00      
   FAQ            01/01/70 00:00      
      Thanks, but...            01/01/70 00:00      
         yes it is            01/01/70 00:00      
            EMI design consideration...            01/01/70 00:00      
               reset pulses?            01/01/70 00:00      
                  Finally a note to the OP            01/01/70 00:00      
                     well, sometimes...            01/01/70 00:00      
                     Fire Extinguisher            01/01/70 00:00      
                        extinguisher            01/01/70 00:00      
                  Latched-up CMOS!            01/01/70 00:00      
                     logic, and beyond            01/01/70 00:00      
                     not a cure            01/01/70 00:00      
   EMI Design            01/01/70 00:00      
      restated in one sentence            01/01/70 00:00      
         Don't jump to the conclusion...            01/01/70 00:00      
            then just say "outside the specs, no can do"            01/01/70 00:00      
      Thanks...            01/01/70 00:00      
   What PCB do you use?            01/01/70 00:00      
      Two Layer            01/01/70 00:00      
         No surprise, then!            01/01/70 00:00      
            Ground...            01/01/70 00:00      
               About naked firefighters...            01/01/70 00:00      
               Absolutely it is fair            01/01/70 00:00      
   Some advice            01/01/70 00:00      
      Yes, it's a bunch of measures...            01/01/70 00:00      
      Good points.            01/01/70 00:00      
         No, no, no,....            01/01/70 00:00      
            Remember            01/01/70 00:00      
         CMOS Latch up            01/01/70 00:00      
         NOPE            01/01/70 00:00      
            You think so...            01/01/70 00:00      
               No, it is not            01/01/70 00:00      
               A proper design would stand it!            01/01/70 00:00      
                  Proper design            01/01/70 00:00      
                     some of my definitions            01/01/70 00:00      
                     Me thinks...            01/01/70 00:00      
                        the real point            01/01/70 00:00      
            More advice            01/01/70 00:00      
               Does that mean, that...            01/01/70 00:00      
                  It's the designers responsibility            01/01/70 00:00      
                     No joke, but...            01/01/70 00:00      
                  EMI and 2 layers            01/01/70 00:00      
                     Yes, for tiny projects...            01/01/70 00:00      
               that something is possible/done succesfully            01/01/70 00:00      
   Show us your design...            01/01/70 00:00      
      Why? You want to make fun of it? :)            01/01/70 00:00      
         Or            01/01/70 00:00      
            You mean...            01/01/70 00:00      
               I do not know what Steve ment            01/01/70 00:00      
               Yes !            01/01/70 00:00      
         how about a schematic            01/01/70 00:00      
            Relays            01/01/70 00:00      
               Even then...            01/01/70 00:00      
         From what I can see            01/01/70 00:00      
            Mostly agree.            01/01/70 00:00      
               Layers, layouts...            01/01/70 00:00      
                  are you serious, or did you forget            01/01/70 00:00      
                     Sorry, I forgot...            01/01/70 00:00      
                     Is it good?            01/01/70 00:00      
                        Just a few points.            01/01/70 00:00      
                           I believe you!            01/01/70 00:00      
                        No harm, usually            01/01/70 00:00      
                  Separate Ground Planes            01/01/70 00:00      
                     Inter-plane coupling            01/01/70 00:00      
                     Cable entry point            01/01/70 00:00      
                        Thanks            01/01/70 00:00      
            what I do ..            01/01/70 00:00      
            half measures            01/01/70 00:00      
            Taking notes...            01/01/70 00:00      
               the downfall of many            01/01/70 00:00      
               Do some tests            01/01/70 00:00      
                  This can be deadly!            01/01/70 00:00      
                     Deadly?            01/01/70 00:00      
                        I'm sorry...            01/01/70 00:00      
         Farshad, I would never make fun of it!            01/01/70 00:00      
            Very Informative            01/01/70 00:00      
               Decoupling            01/01/70 00:00      
                  Thank you!            01/01/70 00:00      
               and not a word about 4 layers            01/01/70 00:00      
   paralelling            01/01/70 00:00      
      Why not using 10µF/10V/X5S ceramics?            01/01/70 00:00      
   more information?            01/01/70 00:00      
      Schematics would not be very "helpfil"            01/01/70 00:00      
      More information            01/01/70 00:00      
      The best stuff I have ever seen is...            01/01/70 00:00      
         Sorry, I forgot, that you must suscribe first...            01/01/70 00:00      
      John, I have seen....            01/01/70 00:00      

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