Try to imagine such a two layer board with two DIL packages at a distance of about 10cm. Imagine the one sends a signal to the other, without the signal trace running over a solid ground plane.

I've provided solid-ground return paths as much as possible in a two layer board. I was cautious to let all ICs have a solid and low-impedance return to ground and fill the empty area between traces with ground layer.

Then a current loop of an area of let's say 10cm x 5cm =50cm^2 is formed. This loop not only emits a magnetic field, but also recieves magnetic fields from external EMI sources, while the induced voltage is proportional to the loop area.

The amount of EMI emitted by the board itself is trivial. The amount it absorbs can be higher than expected of course compared with a 4 layer design.

So, in this example the proper four layer board design is about 100 times less sensitive to external magnetic fields, then your two layer "solution".

That's correct. Maybe not in magnitude of 100 to 1, but a 4 layer can improve EMI resistance effectively.

Do you still think your problems are caused by the microcontroller?? The microcontroller is only the victim of your improper design, not the cause.

It's not fair to call any 2 layer board as improper design. Of course if I was designing it today from scratch I'd be choosing a 4 layer scheme where GND planes were running free throughout the board like wild animals. :)