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???
12/20/04 17:49
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#83538 - Series termination
Responding to: ???'s previous message
Joseph said:
Well, apparently I did a very poor job of stating the original post.

I didn't want to offend you in any way, dear Joseph, I only hoped that the problem you stated was more concrete, like: "We changed the 74HC574 against 74AC574 in combination with 24cm long bus lines, but suddenly signal transmission failed..."


And yes, I think this is a problem that many people think that if they're only using a 1 MHz clock they don't need to worry about high speed effects.

I totally agree! It's dU/dt what counts, the slew rate. Slew rate is what determines how high spike current is flowing into stray and bus capacitance according to I = C x dU/dt, derived from C = Q / U by making the time derivative. And dU/dt is also determining how high ground routing is contaminated by ground noise (ground bounce).

This is the reason, why it's not at all recommended to use faster chips than needed: A slowlier chip that has a lower maximum frequency at the same time has a lower slew rate.

An example: If 1MHz is maximum frequency to be handled, then using 74ACMOS is total overkill. 74HCMOS is much better suited, maybe even HEF4000MOS can be used. BUT: All used chips must be in the same speed range, whatever speed range you choose. If you have one 74ACMOS chip somewhere, it will also need a fast chip to drive its inputs, otherwise oscillations can occur. The reason for this is, that the faster the chip, the higher slew rate of input signal it demands...
So, everything must fit on the board.


But since you brought it up, how and why do the series resistors work? What is their effect on the circuit?

Analyzing transmission line effect is rather difficult, because you leave the region, where 'simple' electrostatics is valid. Electrodynamics is valid, means you have to deal with an electroimagnetic wave packet propagating along a wire-backwire arrangement. But happily one can imagine by 'simple words' what is happening:

If you couple a fast edge into a transmissionline, you will observe a wave packet travelling along it. If somewhere is a discontinuity of line impedance, the interaction between components of magnetical field and electrical field of the wave packet is distorted. As consequence some portion of wave packet is sent back to the source. This portion is missing of course in the forward running wave packet, so that the energy of forward running wave packet is a bit lowered.
This can be explained by the Huygens principle: Each point of the transmission line is the origin of an elementary wave, which is generated, when the wave packet is reaching the point by travelling along. Each elementary wave is propagating in both directions, forward and back. And if there's no dicontinuity of line impedance, then all back running elemantary waves are vanishing, so that only a forward propagating wave packet is observed. But if there's somewhere a discontinuity of line impedance the generated elementary wave at this point does not vanish and a back running wave packet can be seen.
A heavy example of such a discontinuity is the end of transmission line. Fortunately, by a simple trick we can outwit the wave packet and make it believe, that there's no end of transmission line, means that there's no discontinuity: By simply connecting a termination resistor at the end, which must show the identical value as line impedance of transmission line. Then again, the back running elementary wave generated at the end of transmission line will vanish, no reflections will occur and all the energy of wave packet is absorbed in the resistor.

Why is a discontinuity of line impedance so unwanted?
Because the back sent wave packet, or by other words, the reflected wave packet can show an enormeous value, suited to totally erode digital signal shape! With improper or missing termination of transmission line the travelling wave packet is partially reflected everytime it reaches an unterminated end. So, after reaching the end of transmission line a part will be reflected, will run to the source, will again partially reflected (when not properly terminated here), will run to the end and partially be reflected and so forth and so forth. As all these relfections are superimposed and added, the signal at either end looks no longer like a pure edge, but like a stair case function, which is no longer TTL-compatible and heavily violates noise margins.

Theory tells, that termination resistors must sit at both ends. But then recieved signal will always be halved, when reaching the reciever. A problem which in video circuits can easily be overcome by adding a buffer providing a gain of '2'.
In digital circuits using TTL-compatible signals such a halving of signal would be a desaster, because at the end of transmission line all the TTL-compatibility would be lost, of course. Also, as the termination resistors are in the range between 30...200Ohm, an enormous DC current would flow, whenever the driver presents a permanent logical high state: With 50 Ohm termination resistors a current of 5V / 100 Ohm = 50mA would flow!

A very well suited alternative is the use of series termination:
This termination technique only uses termination resistors at the driver side. Means the output of line driver is not connected directly to according copper trace, but via inserted termination resistor, which must match the line impedance (characteristic impedance) of transmission line, of course. The reciever side stays unterminated! What happens is as follows:

When coupling an edge into the transmission line at driver side, a halving of signal takes place, because series termination resistance and line impedance work like a voltage divider of factor '2'. So, a wave packet is travelling along the transmission line of halved amplitude. If it reaches the unterminated end at reciever side, a total reflection takes places, which leads to a doubling of signal amplitude here. So, at input of reciever the edge makes a full swing, as if no transmission line effect had ever taken place!
The totally reflected wave paket travels unweakend back to the driver. Unweakend, because no energy was lost during the reflection at reciever side. Remember that there's no termination resistance, where the signal could lose energy.
So, the reflected wave packet runs back to the driver and gets totally absorbed in the series termination resistor. For total absorption series termination resistance must totally match line impedance of transmission line.

There's a very interesting detail, which is often overlooked:
Obviously at the point, where the signal enters the transmission line at driver side, means behind the series termination resistor, the potential shows a stair case shape, because here immediately after sending the edge the signal is halved by the voltage division caused by series termination resistor and line impedance. Only when the reflected wave packet has finally reached the driver side, also here the potential gets the needed portion to show a full swing. Means, directly behind the series termination resistor the signal shape is not regular, means do not connect any other circuitry to this point!
For the driver and reciever this is no problem at all. Everything is regular! But if you want to connect other circuitry to the driver's output, which is not separated by a transmission line, means which sits close nearby to the driver, then do connect it directly to the output.

If more than one transmission line is to be connected to one driver output, then each one should have an individual series termination resistor. In such a case stronger drivers may be needed.
Special care must be taken if more recievers are connected to the same transmission line, especially if the are connected at different lengths. Such a configuration is irregular and other termination techniques are prefered then.

Kai

List of 59 messages in thread
TopicAuthorDate
Weekend On-Topic (WOnT)            01/01/70 00:00      
   microsoft ??            01/01/70 00:00      
      Cute ;)            01/01/70 00:00      
   Weekend on Topic            01/01/70 00:00      
      A very reasonable hypothesis            01/01/70 00:00      
   happened here            01/01/70 00:00      
      The chip changed            01/01/70 00:00      
         What happened?            01/01/70 00:00      
      Also an excellent hypothesis            01/01/70 00:00      
         too much            01/01/70 00:00      
            Nah.            01/01/70 00:00      
      Me too, But            01/01/70 00:00      
   systematic debugging            01/01/70 00:00      
   Pb-free?            01/01/70 00:00      
   Did the temp characteristics change?            01/01/70 00:00      
   another one from memory            01/01/70 00:00      
   What it's not.            01/01/70 00:00      
      Solution            01/01/70 00:00      
         Speed!            01/01/70 00:00      
            Speed            01/01/70 00:00      
      Would get the oscope, first            01/01/70 00:00      
      Try this            01/01/70 00:00      
      What it is?            01/01/70 00:00      
         Think volume            01/01/70 00:00      
            Not a puzzle!!            01/01/70 00:00      
               Apologies            01/01/70 00:00      
   Re:            01/01/70 00:00      
      Y2K-and-something            01/01/70 00:00      
         Y2K + something            01/01/70 00:00      
            Y2k05            01/01/70 00:00      
               The Unix Epoch and the Year 2038            01/01/70 00:00      
   Yet another true story...            01/01/70 00:00      
      A perfect example            01/01/70 00:00      
         Newer IC            01/01/70 00:00      
      Answer time...?            01/01/70 00:00      
         another guess            01/01/70 00:00      
      language            01/01/70 00:00      
         Faster does not mean better!            01/01/70 00:00      
            Ok            01/01/70 00:00      
               Gladly            01/01/70 00:00      
         To tell the whole truth...            01/01/70 00:00      
   Hidden parameters            01/01/70 00:00      
      Parasitic parameters            01/01/70 00:00      
         Chip manufacturer changed?            01/01/70 00:00      
   Faster/slower or "controlled" rise time            01/01/70 00:00      
   Answer            01/01/70 00:00      
      Amazing....            01/01/70 00:00      
         Amazed            01/01/70 00:00      
            Split Planes            01/01/70 00:00      
      A bit disappointed...            01/01/70 00:00      
         Series resistors and line matching            01/01/70 00:00      
            Series termination resistors            01/01/70 00:00      
            Series termination            01/01/70 00:00      
               SWR            01/01/70 00:00      
               simulation to the rescue            01/01/70 00:00      
                  Thanks!            01/01/70 00:00      
      The same moment?            01/01/70 00:00      
         The same moment!            01/01/70 00:00      
   I'm Back.            01/01/70 00:00      

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