??? 12/21/04 17:58 Read: times |
#83584 - simulation to the rescue Responding to: ???'s previous message |
Analyzing transmission line effect is rather difficult, because you leave the region, where 'simple' electrostatics is valid. Electrodynamics is valid, means you have to deal with an electroimagnetic wave packet propagating along a wire-backwire arrangement. Kai, One can use an IBIS simulation tool such as Hyperlynx to analyze signal integrity. Of course, this assumes IBIS models exist for the particular ICs you're using, but this is not as difficult as one might think. As more engineers are using these tools before committing to fabbing a design (esp. when the board has 20 layers!), the demand for models has gone up and chip vendors have responded. You can get IBIS models for old 74xx chips, too. Of course, a simulation is only as good as the models, but the models I've used have been fine and they certainly get you in the ball park. It's much easier to get something close in a simulation than to try and fix a bad PCB. For those that don't know, IBIS models do not attempt to handle logic simulations. They are intended to model the I/O structures of your ICs. -a |
Topic | Author | Date |
Weekend On-Topic (WOnT) | 01/01/70 00:00 | |
microsoft ?? | 01/01/70 00:00 | |
Cute ;) | 01/01/70 00:00 | |
Weekend on Topic | 01/01/70 00:00 | |
A very reasonable hypothesis | 01/01/70 00:00 | |
happened here | 01/01/70 00:00 | |
The chip changed | 01/01/70 00:00 | |
What happened? | 01/01/70 00:00 | |
Also an excellent hypothesis | 01/01/70 00:00 | |
too much | 01/01/70 00:00 | |
Nah. | 01/01/70 00:00 | |
Me too, But | 01/01/70 00:00 | |
systematic debugging | 01/01/70 00:00 | |
Pb-free? | 01/01/70 00:00 | |
Did the temp characteristics change? | 01/01/70 00:00 | |
another one from memory | 01/01/70 00:00 | |
What it's not. | 01/01/70 00:00 | |
Solution | 01/01/70 00:00 | |
Speed! | 01/01/70 00:00 | |
Speed | 01/01/70 00:00 | |
Would get the oscope, first | 01/01/70 00:00 | |
Try this | 01/01/70 00:00 | |
What it is? | 01/01/70 00:00 | |
Think volume | 01/01/70 00:00 | |
Not a puzzle!! | 01/01/70 00:00 | |
Apologies | 01/01/70 00:00 | |
Re: | 01/01/70 00:00 | |
Y2K-and-something | 01/01/70 00:00 | |
Y2K + something | 01/01/70 00:00 | |
Y2k05 | 01/01/70 00:00 | |
The Unix Epoch and the Year 2038 | 01/01/70 00:00 | |
Yet another true story... | 01/01/70 00:00 | |
A perfect example | 01/01/70 00:00 | |
Newer IC | 01/01/70 00:00 | |
Answer time...? | 01/01/70 00:00 | |
another guess | 01/01/70 00:00 | |
language | 01/01/70 00:00 | |
Faster does not mean better! | 01/01/70 00:00 | |
Ok | 01/01/70 00:00 | |
Gladly | 01/01/70 00:00 | |
To tell the whole truth... | 01/01/70 00:00 | |
Hidden parameters | 01/01/70 00:00 | |
Parasitic parameters | 01/01/70 00:00 | |
Chip manufacturer changed? | 01/01/70 00:00 | |
Faster/slower or "controlled" rise time | 01/01/70 00:00 | |
Answer | 01/01/70 00:00 | |
Amazing.... | 01/01/70 00:00 | |
Amazed | 01/01/70 00:00 | |
Split Planes | 01/01/70 00:00 | |
A bit disappointed... | 01/01/70 00:00 | |
Series resistors and line matching | 01/01/70 00:00 | |
Series termination resistors | 01/01/70 00:00 | |
Series termination | 01/01/70 00:00 | |
SWR | 01/01/70 00:00 | |
simulation to the rescue | 01/01/70 00:00 | |
Thanks! | 01/01/70 00:00 | |
The same moment? | 01/01/70 00:00 | |
The same moment! | 01/01/70 00:00 | |
I'm Back.![]() | 01/01/70 00:00 |