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???
03/23/07 03:50
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 		 #135610 - FPGA with built-in config flash?
Responding to: ???'s previous message
That flash-FPGA is their MAX-II isn't it?

Sadly, they're RAMless.

I occasionally need an odd configuration, e.g, 300 k-gates in a 16-pin package, (4 4/O's) or 50 k_gates with 500Mbytes of block ram. Real PLL's, too, not those ultra-slow, Tacq=two-liftimes things they use for clock distribution. Too bad nobody cares what I want ... <sigh> ...

RE



List of 61 messages in thread
TopicAuthorDate
FPGA            01/01/70 00:00      
   Why on EARTH would you ask that stuff here?            01/01/70 00:00      
   Triscend, Zylogic, Actel            01/01/70 00:00      
      Triscend\'s gone quiet ... is that permanent?            01/01/70 00:00      
         Triscend is dead - now it's Zylogic            01/01/70 00:00      
            re soft-cores            01/01/70 00:00      
               So far, I've not encountered one that works at all            01/01/70 00:00      
         Published ?            01/01/70 00:00      
            Published => open source=> free, as in free beer            01/01/70 00:00      
      Actel Core8051 and Core8051s - "free"            01/01/70 00:00      
         Everyone I know refuses to use actel FPGAs            01/01/70 00:00      
            A good word for Actels            01/01/70 00:00      
            Good question            01/01/70 00:00      
               what we used to do when we gave out evaluation            01/01/70 00:00      
   VHDL Tutorial            01/01/70 00:00      
      Thanks,            01/01/70 00:00      
   Don't forget to read my extremely wonderous            01/01/70 00:00      
      ... and this thread, from a few months ago ...            01/01/70 00:00      
         so ... what did you ever do?            01/01/70 00:00      
            Not really, things change            01/01/70 00:00      
               sounds like '1553            01/01/70 00:00      
                  Yep and the optical version            01/01/70 00:00      
            I got a job!            01/01/70 00:00      
               Good for You!            01/01/70 00:00      
   related question            01/01/70 00:00      
      CPLD and FPGA            01/01/70 00:00      
         I'm not so sure ...            01/01/70 00:00      
      different feature sets, among other differences            01/01/70 00:00      
         I know the differences, thus my question            01/01/70 00:00      
      what happened?            01/01/70 00:00      
         Numbers ... what are the numbers?            01/01/70 00:00      
            Think of a number            01/01/70 00:00      
               FPGA with built-in config flash?            01/01/70 00:00      
                  RAM and Chips            01/01/70 00:00      
                     Maybe, but my needs are "different"            01/01/70 00:00      
                        you need to rethink your bga figures            01/01/70 00:00      
                           It\'s a culture thing ...            01/01/70 00:00      
                              Ive had a design reverse engineered            01/01/70 00:00      
                                 Comments and FPGAs            01/01/70 00:00      
                                 I've had one outright stolen ...            01/01/70 00:00      
                                    Design Security            01/01/70 00:00      
                                       do you report them            01/01/70 00:00      
                                          Reporting Crooks            01/01/70 00:00      
                  huh?            01/01/70 00:00      
                     last I heard xilinx still liked DLLs            01/01/70 00:00      
                        Unfortunately, they're useless as PLL's            01/01/70 00:00      
                           ba humbug!!            01/01/70 00:00      
                              not quite sure what happend there            01/01/70 00:00      
                              not so fast, Jez            01/01/70 00:00      
                     Maybe it\\\'s not so odd ...            01/01/70 00:00      
                        your application requirements are odd!            01/01/70 00:00      
                           I don't recommend against 'em            01/01/70 00:00      
                              evidently "my world' is unreal            01/01/70 00:00      
                                 Perhaps it is            01/01/70 00:00      
                              DLLs and locking            01/01/70 00:00      
                                 I considered that ...            01/01/70 00:00      
                                    re: I considered that ...            01/01/70 00:00      
                                       Consistent with my prior statement            01/01/70 00:00      
                                          you should try using a costas loop            01/01/70 00:00      
                                             That\\\'s for suppressed carrier, isn\\\'t it?            01/01/70 00:00      
   did u refered altera            01/01/70 00:00      

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