CPLD is "tech-speak" for Complex Programmable Logic Device, isn't it? These are based on larger versions of Small Programmable Logic Device (SPLD/PAL/GAL) features, aren't they? Their architecture is often described as "8 32V16's" or some such.

CPLD's don't use LUT's, but have hard logic, concatenated in a programmable construct called a macrocell. Each "32V16," if that's what it is, is associated with a specific macrocell that can either be associated with an i/o cell or not. In either case, however, the logic, timing, etc, is pretty much the same, regardless of what you use or don't use.

That's really quite different from what FPGA's offer.

I, frankly, am glad for the differences. Now that the mfg's are cooking up FPGA devices that can actually be protected from copying, I'll like 'em a lot better, though.

I guess it's all in how you choose to see things.

RE