??? 03/27/07 11:00 Read: times |
#135953 - your application requirements are odd! Responding to: ???'s previous message |
Richard Erlacher said:
Andy Peters said:
Richard Erlacher said:
That flash-FPGA is their MAX-II isn't it?
Sadly, they're RAMless. MAX-II sounds like an Altera CPLD. I must have gone to sleep. They are ALTERA CPLD's but have architectural features similar to FPGA's. That's because they are FPGAs marketed as CPLDs. Richard Erlacher said:
Well, maybe, but only because the die wouldn't fit. If I need 2-dimensional FFT's on a video bitstream for scan-rate conversoin, and need only Ri, Gi, Bi, and CLOCKi in, and Ro, Go, Bo, and CLOCKo as outputs, who needs the other 240 pins? Richard Erlacher said:
Extreme case, mayabe, but suppose you want to store an entire frame of high-definition TV so that you can process it into a format compatible with a 4096x2560 monitor in real time? All that while runing LINUX on the coresident CPU with 4 DSP's and associated hardware. No external SDRAM can be kept up. All nonsense requirements, but suppose if tomorrow there would be a 16DIP Spartan4 or 1GB M512K Stratix4, you would be the first to then complain why these devices are not 5V tolerant. Since you recommend against designing with FPGAs, all that rant doesn't matter really. Cheers, Roger |