| ??? 03/26/07 17:52 Read: times |
#135923 - huh? Responding to: ???'s previous message |
Richard Erlacher said:
That flash-FPGA is their MAX-II isn't it?
Sadly, they're RAMless. MAX-II sounds like an Altera CPLD. The Lattice flash-based FPGAs do have both block and LUT RAM. I occasionally need an odd configuration, e.g, 300 k-gates in a 16-pin package, (4 4/O's) That's quite odd. or 50 k_gates with 500Mbytes of block ram. MEGA bytes? Real PLL's, too, not those ultra-slow, Tacq=two-liftimes things they use for clock distribution. Too bad nobody cares what I want ... ... Oh, you should read how Xilinx can't make up their minds whether the DLL or the PLL is superior. -a |
