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03/27/07 15:43
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#135963 - I don't recommend against 'em
Responding to: ???'s previous message
but I do recommend against most of their eval boards because they have too much "stuff" on 'em ... stuff that gets in the way when you go to use them for something useful.

I do use 'em frequently enough, but not on the off-the-shelf eval kits that have lots of LED's, buttons, LCD's and other external hardware that can't be disconnected from the FPGA. (One Insight EVB had jumpers so you could remove the "demo" loads.) It's likewise with the CPLD's. I use 'em for test fixtures, since I can generate complex functions without having to add lots of hardware, and, with the boards I use, I can add external resources, e.g, buffers, level shifters, etc. 5-volt CPLD's of course, are still pretty common, while the old XC4000-series or original Spartans are long gone.

Yes, I complain about the fact you have to add lots of level shifters if you have parallel I/O functions, and I wouldn't use 'em in the same way in a production device, but, despite all the inconvenience, with the right boards, it's pretty easy to get from here to there with 'em. That's why you find me fooling with 'em every day.

When I'm done, I can put the boards back on the shelf and wait for the next time I need 'em. That's the part I really love.

Most things aren't so extreme as the examples I brought up, that is, I don't generally NEED to have a big part in a small package, and I don't generally need a huge memory on board, but it saves lots of time when you can use the on-board block ram rather than attaching an external RAM particularly since propagation delays to/from off-chip resources slows things down. Yes, there are ways of working around such limitations, but they're not "convenient."

My complaint wasn't about the marketing guys. Everybody knows they lie. It's the support people who can't seem to get the story straight.

You're right, I do complain all the time about the fact these devices aren't 5V compatible. The Spartan-II's tolerate 5-volts but don't drive it. However, a resistor is not too big a price to pay. Having to use lots of level-shifters in order to "talk" to real-world (not battery-operated) hardware is really inconvenient. I don't know how people use the things in real-world applications. It certainly wouldn't make me happy to have to put $15 in level shifters with a $25 FPGA. It sort-of kills the cost savings. It's cheaper to use the older FPGA families.

As for the DLL writeups, the library description insists that it should lock in 16 clock ticks, while the more generous writeups caution that loss of lock, as occurs when the signal is interrupted can cause a 2 second delay before lock is resetablished. I've never been able to get clarification on this. What's more, while they insist that the Spartan DLL's (I like the Spartan-II's because they're 5V-tolerant) behave as described in their library component description, all the other writeups to which I've been referred refer to them as Virtex DLL's, which I have to doubt is what they are.

It troubles me that so useful a technology can be encumbered by so many little "gotchas."

RE

List of 61 messages in thread
TopicAuthorDate
FPGA            01/01/70 00:00      
   Why on EARTH would you ask that stuff here?            01/01/70 00:00      
   Triscend, Zylogic, Actel            01/01/70 00:00      
      Triscend\'s gone quiet ... is that permanent?            01/01/70 00:00      
         Triscend is dead - now it's Zylogic            01/01/70 00:00      
            re soft-cores            01/01/70 00:00      
               So far, I've not encountered one that works at all            01/01/70 00:00      
         Published ?            01/01/70 00:00      
            Published => open source=> free, as in free beer            01/01/70 00:00      
      Actel Core8051 and Core8051s - "free"            01/01/70 00:00      
         Everyone I know refuses to use actel FPGAs            01/01/70 00:00      
            A good word for Actels            01/01/70 00:00      
            Good question            01/01/70 00:00      
               what we used to do when we gave out evaluation            01/01/70 00:00      
   VHDL Tutorial            01/01/70 00:00      
      Thanks,            01/01/70 00:00      
   Don't forget to read my extremely wonderous            01/01/70 00:00      
      ... and this thread, from a few months ago ...            01/01/70 00:00      
         so ... what did you ever do?            01/01/70 00:00      
            Not really, things change            01/01/70 00:00      
               sounds like '1553            01/01/70 00:00      
                  Yep and the optical version            01/01/70 00:00      
            I got a job!            01/01/70 00:00      
               Good for You!            01/01/70 00:00      
   related question            01/01/70 00:00      
      CPLD and FPGA            01/01/70 00:00      
         I'm not so sure ...            01/01/70 00:00      
      different feature sets, among other differences            01/01/70 00:00      
         I know the differences, thus my question            01/01/70 00:00      
      what happened?            01/01/70 00:00      
         Numbers ... what are the numbers?            01/01/70 00:00      
            Think of a number            01/01/70 00:00      
               FPGA with built-in config flash?            01/01/70 00:00      
                  RAM and Chips            01/01/70 00:00      
                     Maybe, but my needs are "different"            01/01/70 00:00      
                        you need to rethink your bga figures            01/01/70 00:00      
                           It\'s a culture thing ...            01/01/70 00:00      
                              Ive had a design reverse engineered            01/01/70 00:00      
                                 Comments and FPGAs            01/01/70 00:00      
                                 I've had one outright stolen ...            01/01/70 00:00      
                                    Design Security            01/01/70 00:00      
                                       do you report them            01/01/70 00:00      
                                          Reporting Crooks            01/01/70 00:00      
                  huh?            01/01/70 00:00      
                     last I heard xilinx still liked DLLs            01/01/70 00:00      
                        Unfortunately, they're useless as PLL's            01/01/70 00:00      
                           ba humbug!!            01/01/70 00:00      
                              not quite sure what happend there            01/01/70 00:00      
                              not so fast, Jez            01/01/70 00:00      
                     Maybe it\\\'s not so odd ...            01/01/70 00:00      
                        your application requirements are odd!            01/01/70 00:00      
                           I don't recommend against 'em            01/01/70 00:00      
                              evidently "my world' is unreal            01/01/70 00:00      
                                 Perhaps it is            01/01/70 00:00      
                              DLLs and locking            01/01/70 00:00      
                                 I considered that ...            01/01/70 00:00      
                                    re: I considered that ...            01/01/70 00:00      
                                       Consistent with my prior statement            01/01/70 00:00      
                                          you should try using a costas loop            01/01/70 00:00      
                                             That\\\'s for suppressed carrier, isn\\\'t it?            01/01/70 00:00      
   did u refered altera            01/01/70 00:00      

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