Why do nearly all manufacturers refer back to the original Intel reset circuit, with a 10 uF cap to Vcc and an 8k2 resistor to GND? None of them indicate that a "supervisor" is required, though I've seen at least one in a manufacturer's app-note.

Supervisors seem to have been "appointed" as the cure-all for problems arising from an abysmal fundamental design flaw in the 805x core, namely that there really is no hardware-reset signal. There's apparently not even a power-on clear. According to what Lynn Reed (Tekmos) told us, there's just a non-maskable interrupt, one that starts some things over again in a known state.

Based on what I've read here and there, the time constant of the RC that's typically recommended amounts, essentially, to the oscillator startup time plus about 64k counts of the 12 MHz oscillator. Now, this could be irrelevant, since I don't recall any change in this RC value, for other clock frequencies, but it does fit with what some chip makers say about their parts.

Even Maxim/Dallas, which claims to have an internal oscillator that runs the startup and switches to the external crystal oscillator only after it has counted through 64k cycles, recommends an RC reset circuit.

As Kai has pointed out, the crystal oscillator keeps on running during brownouts, when a supervisor would, most likely, assert RESET, but it's been observed that this doesn't necessarily eliminate the problem of FLASH corruption. Dallas published an errata indicating that FLASH corruption was enough of an issue that they revised their 89C4x0 silicon in order to "fix" it.

It's been said again and again, that the MCU doesn't necessarily stop and restart "from scratch" each time RESET is asserted. It's been stated time and again, that the charge pump and state machines that make internal FLASH work properly aren't necessarily restarted "from scratch" on RESET. It doesn't take a rocket scientist to figure out that the MCU with on-board FLASH is particularly vulnerable during power-down or brownouts, since the charge-pump is fully charged during those intervals, and the controlling state machine unpredictable if Vcc goes dangerously low.

From what I've learned so far, supervisors offer absolutely no protection whatsoever from this latter problem.

It seems to me that the only way to get around this risk is to ensure that Vcc at the MCU goes all the way to GND, and that the oscillator is at dead-stop once RESET is asserted.

I've experimented with this matter as time has allowed, starting with the original 803x and 805x types, and on to the more up-to-date types, and find they all occasionally misbehave. 803x's occasionally, not predictably, but often enough for one to notice, corrupt their NVRAM during brownout/power-down. 89C4x0's very rarely (based on my very limited sample) do the same. They also apparently p*ss on their internal FLASH, though I haven't yet started to test that phenomenon.

I'm gradually convincing myself that the only really safe way to use a supervisor is to have its RESET output drive a mosfet to pull down Vcc and another to stop the oscillator. Only long-term and rigorous testing will verify that, however.

RE