| ??? 10/04/07 20:06 Read: times |
#145422 - more details please Responding to: ???'s previous message |
Richard Erlacher said:
I've observed that ALE, nRD, nPSEN, and, worst of all, nWR continue to occur after RESET is asserted on the two, (Dallas, and Philips) MCU's that I was using, though I did not pursue the matter at the time. I in http://www.8052.com/forum/read.phtml?id=145271 said:
Oh, this is that first experiment you conducted I assume. I always wanted to hear more details about that (and, I would like you to ask you to try a couple of things, if you want to go back to this case).
But, first, you say that you "observed MCU activity during RESET asserted", does this mean that you had tied up a scope both to RESET and some of the RAM signals (say, the most interesting, /CS and/or /WE), and/or VCC; and recorded this activity? Any pictures, perhaps? Richard Erlacher said: You can use the RESET signal to gate /CS of course, but, first of all, it is suspicious that the mcu did not stop memory access upon RESET, so that should be investigated first. Also the memory should be insensitive to any activity below its stated threshold - that's why are you using that very expensive sort of memory at all, isn't it. I'd suspect at first hearing that you don't supply the BBRAM and '1232 from the same supply branch as the mcu - but that's of course only a wild guess without seing the actual circuit. Can you please post schematics here?
I'm not sure what I could safely have done to "stop" anything from operating once RESET was asserted. Richard Erlacher said:
The only external logic components were two latches (HCT573) and an 'HCT00, along with that DS1232. The 'HCT00 produced the select and enable strobes to the two BBRAMs. I don't understand what the purpose of the 'HCT00 gates are. Can you please post schematics of that part, too? JW |



