That's only half the story. The original '51 was a dynamically working micro, the clock frequency must not go under a certain limit. The reset also was dynamically working, means worked like a NMI. But todays CMOS clones show a fully static operation. Many even have an asynchronous reset, which immediately resets the port outputs when bringing the RESET pin high, independently of the oscillator and all this dynamically working stuff. So, why shouldn't be there an internal section, which is statically working and which stops all the internal flash code memory changing micro routines, whenever the RESET pin is brought high? A section which later was added, when the micro learned to write to its own flash code memory??

For me the situaion is entirely simple: There's an internal section, which disables all the ISP micro routines, whenever the RESET pin is brought high. This section works statically and behaves as intended up to a certain minimum supply voltage, let's say 2...3V. Down to this level the reset controller must guarantee a stable high at RESET pin, but which is no problem at all. When then the supply voltage furtherly goes down, and this internal section of micro tends to behave improperly, then still nothing bad will happen, because the built-in charge pump is no longer able to generate the burning voltage needed to write a byte into the code memory. That's the way it works in the discrete flash memory chips, so why shouldn't the microcontroller people be able to embedd a similar logic to prevent the internal flash code memory of micro from being eroneously written??

Why are you so possessed from the idea, that this micro thing will become entirely chaotic, whenever the supply falls under 4.5V?? That only a forced instantaneous collapse of supply voltage with all its disadvantages will "solve" the "problem"? That the datasheet does not contain information about such an internal section does not need to mean that something like that isn't built-in. Are you really thinking a micro is as simple constructed as the simplicity of datasheet will make you believe? The hell is going on in these beasts, and believe me, the manufacturer have found a way to prevent this damned flash code memory from being eroneously written or changed, if yes, if you only follow the recommendations of the manufaturer and keep this shitty RESET pin high during power-up and power-down.

You might have read this once or even multiple times, but you insist so intensively that ATMEL is a shitty firm, that you will not notice that they have written a plenty of brillant application notes about this topic, wherein, yes, they recommend you to use a reset chip or circuitry, which, yes, has to guarantee that the reset pin is held high during all undervoltage situations.

Richard, the needed information of how to make a micro successfully work is here. But you must read it and follow the manufacturers' recommendations.



Yehesssss!!
But I'm tired to show you the link, because 1. you won't read and believe it, and 2. the next discussion you will bring the same statement again, as if we never had discussed these things. I become tired to defend my stand-point again and again and again..



Not the MAX1232, but the whole scheme, as explained above.



No, not all do that. The datasheet of AT89S52 is free from such claims. But, I forgot, you hate ATMEL and won't ever read this datasheet.



That's my best approach to solve this reset issue. Show me a better if you can and I will adopt it, immediately.


Regards,

Kai