| ??? 10/04/07 14:40 Read: times Msg Score: +1 +1 Good Answer/Helpful |
#145387 - We aren't so differently... Responding to: ???'s previous message |
Richard said:
Well, Lynn Reed wasn't describing the the "original" NMOS parts when he said that, was he? His company, TEKMOS, builds CMOS. I didn't say that the NMI disappeared, only that some statically working section could be added, which senses the level at RESET pin and blocks all the flash code memory changing micro routines, when this pin is brought high. Richard said:
Yes, there are even some with negative reset, which I like a lot better. I've not encountered a datasheet that clearly states that the reset is asynchronous and what it does, though. Where did you encounter that? This was an example to show you, that some internal parts of todays CMOS clones are already statically resetted (asynchronously). The synchronous reset was a big disadvantage, because after a power-on the port outputs were undetermined up to the moment when the oscillator has fully started. Now, the port outputs are immediately resetted during the power-on, provided, that the RESET pin is brought to Vcc level. The asynchronous resetting of ports is not always stated in datasheet. But when "fully static operation" is mentioned, then you will find an asynchronous reset of port outputs mostly. Richard said:
I'd be the last one to say there shouldn't be such a thing. I've seen no indication anywhere, yet, that suggests that there is, however. Logical as it may seem, I have to wonder, "Why do you believe that?" ATMEL, as a mega seller of discrete flash memories, was the first who successfully added the flash code memory to the '51 core. They have a logic to successsfully prevent their flash memory chips from eroneously being written during power-ups and -downs. Because of that, I think, that they must have found a similar solution for the flash code memory of micro. Richard said:
Yes, if it were so, but then, what is a stabile "high" when Vcc is changing, and where is it generated? By "high" I mean a level which equals Vcc, of course. So, wherever I wrote "the RESET pin must be brought high" I actually mean "the RESET pin must be brought to Vcc level". A turned-on PMOS FET having its source connected to Vcc will easily deliver this level. Richard said:
As for me being possessed, maybe I am, but I'm much more disturbed by the fact that nobody has traced a "RESET" problem down to any signal sequence that's abnormal to the extent that they can tell about it and indicate why the problem was caused by a RESET fault.
Engineers perform failure mode and effects analyses when things go wrong. They analyze the circuit based on theory and specified conditions, determine what effects each behavioral deviation might cause, and then attempt to show that that set of conditions exists, and, further, that that is what caused the failure. It doesn't appear that anyone has attempted to isolate or verify this "RESET" fault. I find that disappointing. Richard, I have no time to analyze this reset issue in full detail. I just follow the recommendations of manufacturer and have no problems concerning this reset issue. I have a lot other problems in my projects, though. I have to make fast 16bit ADCs/DACs to work "noiseless". I have to deal with analog levels in the nanovolt range and I'm absolutely happy with this simple reset solution, because now I have more time free to solve my other problems, which are real problems. Analyzing this signal sequencing you mentioned is a luxury I cannot afford at all. Also, what shall be the sense of this analyze, when it's not documented, means confirmed by the manufacturer and when the next lot of micros can work totally different, because they have made some changes in the mean time and the certain power-up and -down sequencing which just solved your reset problems no longer works? When I would propose a "solution" for the reset issue, which does not follow the recommendations given by the manufacturer, can you imagine what will happen, if something still goes wrong?? Do you think my boss longer assumes, that I'm a good circuit designer? No, he will think this guy is mad and wastes board space and money for entirely useless "solutions". He will fire me, of course, if the damage caused by my extravagances is high enough. Richard said:
Not one manufacturer says that a supervisor is mandatory in order to ensure orderly operation. They hint around the notion that it might be helpful and recommend it in app-notes.
... I've seen no datasheet that clearly states that the product will not work reliably without a supervisor. I've seen app-notes that discuss them. Richard, please, don't be naive. What do you expect from the manufacturer?? That he is the first and only one who starts to demand a reset chip, where all other manufacturers tell that the RC reset is good enough??? It's a radical mistake to assume, that the datasheet is a scientific dissertation where the truth and only the truth is stated. No, a datasheet is mixture of advertisement, tradition and informantion, in this order. When all datasheets say, that you can reset the micro by a simple RC circuit, then you won't find any manufacturer who states that a reset chip is needed. Because this makes his product less good than the competitors' micros. No, the useful information you will find when reading between the lines. If they no longer explicitely recommend the RC reset in their datasheet, means if they keep "silence" about this issue but at the same time have an application note, which tells that a reset chip can be "very helpful" in this reset issue, then, come on Richard, this is the same as if they very loadly cry "ALWAYS USE A RESET CHIP!!!" Do you really see this differently?? Come on, Richard, we are long enough in this business to be able to read between the lines, aren't we? Richard said:
What that means is that I'll be looking in further detail at that situation with the decaying Vcc with RESET=Vcc, and Vcc decaying below 4.5 volts, resulting in corrupted BBRAM. That will probably lead to some lively discussion. I invite you to test my approach I earlier discussed. Richard, show me that I'm wrong and I'm the first who will be often for a change. Because then I have somthing to show my boss... Kai |
