Well, I know it's dangerous, but I'm making a wild assumption, namely, that the MCU will behave nominally after a "standard" (whatever that turns out to be) power-on reset.



If the oscillator is stopped for what would otherwise be a couple of cycles, and the MCU is reset for a period long enough for it to restart, then everything else would probably be OK. However, unless Vcc rises sharply, the oscillator might not start just because I "let" it. Usually they want a bit of a "kick." My scheme for clamping Vcc to GND during the first cycle or two and holding it long enough to discharge Vcc to < 0.2 volts after RESET goes true would do that, as it would then be followed by a swift rise on Vcc, with RESET still true, just as in a power-on cycle, when (A) the clamp to GND is removed, and (B) the input to the regulator is turned on once again.



This idea is still evolving, though I'm definitely incorporating support for it in my test fixture.

I hoped you had some wisdom to offer with respect to possible consequences of either allowing Vcc to rise too quickly (< 20 microseconds) or to fall too quickly (<1 microsecond). Keep in mind that I'd do this through a low-cost power MOSFET with a pretty low (<1 ohm) but still significant on-resistance.

RE